Xilinx 3.2 manual Online Document, Preface About This Guide Convention Meaning or Use Example

Page 8

Preface: About This Guide

	Convention	Meaning or Use	Example

		Variables in a syntax statement
		for which you must supply	ngdbuild design_name
		values

	Italic font	References to other manuals	See the User Guide for details.

			If a wire is drawn so that it
		Emphasis in text	overlaps the pin of a symbol, the
			two nets are not connected.

	Dark Shading	Items that are not supported or	This feature is not supported
	Dark Shading	reserved	This feature is not supported
		reserved

		An optional entry or parameter.
	Square brackets [ ]	However, in bus specifications,	ngdbuild [option_name]
	Square brackets [ ]	such as bus[7:0], they are	design_name
		such as bus[7:0], they are	design_name
		required.

	Braces { }	A list of items from which you	lowpwr ={onoff}
	Braces { }	must choose one or more	lowpwr ={onoff}
		must choose one or more

	Vertical bar	Separates items in a list of	lowpwr ={onoff}
	Vertical bar	choices	lowpwr ={onoff}
		choices

	Angle brackets < >	User-defined variable or in code	<directory name>
	Angle brackets < >	samples	<directory name>
		samples

	Vertical ellipsis		IOB #1: Name = QOUT’
	Vertical ellipsis		IOB #2: Name = CLKIN’
	.	Repetitive material that has	IOB #2: Name = CLKIN’
	.	Repetitive material that has	.
	.	been omitted	.
	.	been omitted	.
	.		.
	.		.
			.

	Horizontal ellipsis . . .	Omitted repetitive material	allow block block_name loc1
	Horizontal ellipsis . . .	Omitted repetitive material	loc2 ... locn;
			loc2 ... locn;

		The prefix ‘0x’ or the suffix ‘h’	A read of address 0x00112975
	Notations	indicate hexadecimal notation	returned 45524943h.

		An ‘_n’ means the signal is	usr_teof_n is active low.
		An ‘_n’ means the signal is
		active low
		active low

Online Document

The following linking conventions are used in this document:

	Convention	Meaning or Use	Example

		Cross-reference link to a	See the section “Guide
		Cross-reference link to a	Contents” for details.
	Blue text	location in the current	Contents” for details.
	Blue text	location in the current	See “Title Formats” in Chapter 1
		document	See “Title Formats” in Chapter 1
		document	for details.
			for details.

	Blue, underlined text	Hyperlink to a website (URL)	Go to www.xilinx.com for the
	Blue, underlined text	Hyperlink to a website (URL)	latest speed files.
			latest speed files.

8	www.xilinx.com	CAN Getting Started Guide
		UG186 April 19, 2010

Image 8

Contents LogiCORE IP can UG186 April 19Revision History Version RevisionTable of Contents Detailed Example Design Schedule of Figures 1Example DesignCan Getting Started Guide Conventions Guide ContentsAbout This Guide Online Document Preface About This Guide Convention Meaning or Use ExampleIntroduction About the Core System RequirementsWindows LinuxRecommended Design Experience Additional Core ResourcesTechnical Support FeedbackLicensing the Core Before you BeginLicense Options Simulation OnlyInstalling Your License File Obtaining Your License KeyQuick Start Example Design OverviewGenerating the Core Quick Start Example DesignSetting up for Simulation Implementing the Example DesignSimulating the Example Design Implementing the Example DesignFunctional Simulation Timing SimulationDetailed Example Design Directory and File Contents Directory and File Contents Componentnameexample designComponentname/doc Name DescriptionComponentname/implement Componentname/implement/resultsComponentname/simulation 5Implement Directory Name DescriptionComponentname/simulation/functional Simulation/timing Implementation Scripts Implementation ScriptsSimulation Scripts Example Design Configuration 1illustrates the example design configurationDemonstration Test Bench Demonstration Test BenchTest Bench Functionality Core with Acceptance Filtering Customizing the Demonstration Test Bench Changing the DataDetailed Example Design