Xilinx 3.2 manual Componentnameexample design, Componentname/doc, Directory and File Contents

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Directory and File Contents

<component_name>example design

The example design directory contains the example design files provided with the core. Table 4-3:Example Design Directory

Name	Description

<project_dir>/<component_name>/example_design

<component_name>_top.ucf	Provides example constraints necessary for
	processing the CAN core using the Xilinx
	implementation tools.

<component_name>_top.v[hd]	The VHDL or Verilog top-level file for the
	example design; it instantiates the CAN core.

<component_name>.v	Top-level file for the example design. Only
	generated when Verilog design flow is
	selected.

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<component_name>/doc

The doc directory contains the PDF documentation provided with the core.

Table 4-4:Doc Directory

Name		Description

	<project_dir>/<component_name>/doc

can_ds265.pdf		CAN v3.2 Data Sheet

can_gsg186.pdf		CAN v3.2 Getting Started Guide

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CAN Getting Started Guide

www.xilinx.com

19

UG186 April 19, 2010

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Contents UG186 April 19 LogiCORE IP canVersion Revision Revision HistoryTable of Contents Detailed Example Design 1Example Design Schedule of FiguresCan Getting Started Guide About This Guide Guide ContentsConventions Preface About This Guide Convention Meaning or Use Example Online DocumentLinux IntroductionAbout the Core System Requirements WindowsFeedback Recommended Design ExperienceAdditional Core Resources Technical SupportSimulation Only Licensing the CoreBefore you Begin License OptionsObtaining Your License Key Installing Your License FileOverview Quick Start Example DesignQuick Start Example Design Generating the CoreImplementing the Example Design Setting up for SimulationImplementing the Example Design Simulating the Example DesignTiming Simulation Functional SimulationDetailed Example Design Directory and File Contents Name Description Directory and File ContentsComponentnameexample design Componentname/doc5Implement Directory Name Description Componentname/implementComponentname/implement/results Componentname/simulationComponentname/simulation/functional Simulation/timing Simulation Scripts Implementation ScriptsImplementation Scripts 1illustrates the example design configuration Example Design ConfigurationTest Bench Functionality Demonstration Test BenchDemonstration Test Bench Core with Acceptance Filtering Changing the Data Customizing the Demonstration Test BenchDetailed Example Design