Xilinx 3.2 manual Customizing the Demonstration Test Bench, Changing the Data

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Demonstration Test Bench

•After the fourth message is transmitted and received, the Interrupt Enable Register is written to enable interrupts for TXOK, RXOK and TXBFLL. This register is read from and the value read is compared with the value written.

•The fifth message does not pass acceptance filtering. Only the TXOK bit in the ISR is set when the ISR is asserted.

Customizing the Demonstration Test Bench

This section describes the variety of demonstration test bench customization options that can be used for individual system requirements.

Changing the Data

You can change the contents of the message written to the TX FIFO / TX HPB by changing the procedure call that writes to the TX FIFO and the TX HPB memory locations. The relevant fields in the checkers must also be changed to ensure that the message read from the RX FIFO matches the message that was transmitted.

Changing the CAN Parameters

The values written to the BRPR and the BTR registers can be changed for appropriate bit timing values. The test bench operates in the Loop Back mode of operation.

Changing the Test Bench Structure

You can add messages using the following steps.

1.Write the message to the TX FIFO.

2.Wait for an interrupt and process the interrupt.

3.Read the received message from the RX FIFO.

CAN Getting Started Guide

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UG186 April 19, 2010

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Contents UG186 April 19 LogiCORE IP canVersion Revision Revision HistoryTable of Contents Detailed Example Design 1Example Design Schedule of FiguresCan Getting Started Guide Guide Contents About This GuideConventions Preface About This Guide Convention Meaning or Use Example Online DocumentLinux IntroductionAbout the Core System Requirements WindowsFeedback Recommended Design ExperienceAdditional Core Resources Technical SupportSimulation Only Licensing the CoreBefore you Begin License OptionsObtaining Your License Key Installing Your License FileOverview Quick Start Example DesignQuick Start Example Design Generating the CoreImplementing the Example Design Setting up for SimulationImplementing the Example Design Simulating the Example DesignTiming Simulation Functional SimulationDetailed Example Design Directory and File Contents Name Description Directory and File ContentsComponentnameexample design Componentname/doc5Implement Directory Name Description Componentname/implementComponentname/implement/results Componentname/simulationComponentname/simulation/functional Simulation/timing Implementation Scripts Simulation ScriptsImplementation Scripts 1illustrates the example design configuration Example Design ConfigurationDemonstration Test Bench Test Bench FunctionalityDemonstration Test Bench Core with Acceptance Filtering Changing the Data Customizing the Demonstration Test BenchDetailed Example Design
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