Xilinx 3.2 manual Generating the Core, Quick Start Example Design

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Chapter 3: Quick Start Example Design

Generating the Core

This section describes how to generate a CAN core with default values using the Xilinx CORE Generator™ tool.

To generate the core:

1.Start the CORE Generator tool.

For help starting and using the CORE Generator tool, see the Xilinx CORE Generator Guide, available from the ISE documentation web page.

2.Choose File > New Project.

3.Type a directory name.

This example uses the directory name design.

4.Do the following to set project options:

Part Options

-From Target Architecture, select the desired family. For a list of supported families, see the CAN Data Sheet.

Note: If an unsupported silicon family is selected, the CAN core will not appear in the taxonomy tree.

Generation Options

- For Design Entry, select either VHDL or Verilog.

5.After creating the project, locate the CAN core in the taxonomy tree under Automotive & Industrial >Automotive > CAN.

6.Double-click the core to display the main CAN configuration screen.

Figure 3-2:CAN Main Screen

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CAN Getting Started Guide

 

 

UG186 April 19, 2010

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Contents LogiCORE IP can UG186 April 19Revision History Version RevisionTable of Contents Detailed Example Design Schedule of Figures 1Example DesignCan Getting Started Guide Conventions Guide ContentsAbout This Guide Online Document Preface About This Guide Convention Meaning or Use ExampleWindows IntroductionAbout the Core System Requirements LinuxTechnical Support Recommended Design ExperienceAdditional Core Resources FeedbackLicense Options Licensing the CoreBefore you Begin Simulation OnlyInstalling Your License File Obtaining Your License KeyQuick Start Example Design OverviewGenerating the Core Quick Start Example DesignSimulating the Example Design Setting up for SimulationImplementing the Example Design Implementing the Example DesignFunctional Simulation Timing SimulationDetailed Example Design Directory and File Contents Componentname/doc Directory and File ContentsComponentnameexample design Name DescriptionComponentname/simulation Componentname/implementComponentname/implement/results 5Implement Directory Name DescriptionComponentname/simulation/functional Simulation/timing Implementation Scripts Implementation ScriptsSimulation Scripts Example Design Configuration 1illustrates the example design configurationDemonstration Test Bench Demonstration Test BenchTest Bench Functionality Core with Acceptance Filtering Customizing the Demonstration Test Bench Changing the DataDetailed Example Design