Texas Instruments DAC8555EVM manual Output Op Amp, DAC Output Channel Mapping

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EVM Operation

Table 3. DAC Output Channel Mapping

Reference

Jumper Position

Function

JMP11

1-2

DAC output A (VOUTA) is routed to J4-2.

2-3

DAC output A (VOUTA) is routed to J4-10.

 

JMP12

1-2

DAC output B (VOUTB) is routed to J4-4.

2-3

DAC output B (VOUTB) is routed to J4-12.

 

JMP13

1-2

DAC output C (VOUTC) is routed to J4-6.

2-3

DAC output C (VOUTC) is routed to J4-14.

 

JMP14

1-2

DAC output D (VOUTD) is routed to J4-8.

2-3

DAC output D (VOUTD) is routed to J4-16.

 

In order to allow exclusive control of each EVM, different SYNC signals must be selected for each DAC8555. This difference is not easily accomplished as it involves hardware alterations. The EVM board that sits on the bottom of the stack can use the SYNC signal coming from J2B-7. The pin of J2A-7 can be cut so that the SYNC signal coming from the bottom EVM board in the stack does not pass through. The EVM board that sits on top can use the CNTL signal coming from J2-1. The signal of J2-1 must be jumpered across to J2-7 of the EVM board that sits on the top of the stack. The LDAC, SYNC and ENABLE control signals are shared. The DAC8555 only responds when the correct SYNC signal is generated.

The raw outputs of the DAC can be probed through the even numbered pins of J4, the output terminal, which also provides mechanical stability when stacking or plugging into any interface card. In addition, it provides easy access for monitoring up to eight DAC channels when stacking two EVMs together.

3.4Output Op Amp

The DAC8555EVM includes an optional signal conditioning circuit for the DAC output through an external operational amplifier, U2. The output op amp is set to unity gain configuration by default. Only one DAC output channel can be monitored at any given time. JMP15 selects which pin of J4 is the input. Either J4-1 or J4-3 can be used as the op amp signal input. The default setting for JMP15 selects J4-1. A shorting jumper can be placed between one of the DAC outputs and the op amp input. For example, a jumper across J4-1 and J4-2 places the DAC A output as the input for the op amp if board jumpers are in the default position. If JMP15 is in the alternate position, then a shorting block between J4-3 and J4-2 makes the DAC B output the input to the op amp.

The output of U2 passes through JMP16. In the default position, the output connects to J4-5. When JMP16 is in the alternate position, the output from U2 connects to J4-7. The output can be monitored from, or passed to, another device from the J4 connector.

The jumper arrangement of JMP15 and JMP16 connecting to J4 allows U2 to be used in the stacked board arrangement discussed above in Section 3.3.

The following subsections describe the different configurations of the output amplifier, U2.

SLAU204 –December 2006

DAC8555EVM User's Guide

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Contents DAC8555EVM Users Guide Overview PCB Design and Performance EVM Operation Schematic Power Requirements FeaturesSupply Voltage Reference VoltageEVM Basic Functions DAC8555EVM Functional Block Diagram PCB Layout PCB Design and PerformanceDAC8555EVM PCB-Top Silkscreen Image DAC8555EVM PCB-Layer 2 Ground Plane DAC8555EVM PCB-Layer 4 Bottom Signal Layer DAC8555EVM-Drill Drawing EVM PerformanceINL and DNL Characterization Graph of DAC a INL and DNL Characterization Graph of DAC B INL and DNL Characterization Graph of DAC C INL and DNL Characterization Graph of DAC D Bill of Materials DAC8555EVM Parts ListFactory Default Jumper Settings Default SettingsHost Processor Interface EVM StackingDAC Output Channel Mapping Output Op AmpOutput Gain of 2 Jumper Settings Unity Gain Output Jumper SettingsUnity Gain Output Output GainJumper Settings Optional Signal Conditioning Op-Amp U4BCapacitive Load Drive Output Jumper Settings Jumper Settings and FunctionsReference JMP12 JMP13 JMP14 JMP15 JMP16 Schematic Ti a Evaluation BOARD/KIT Important Notice FCC WarningImportant Notice