Texas Instruments manual DAC8555EVM PCB-Top Silkscreen Image

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PCB Design and Performance

Figure 2. DAC8555EVM PCB—Top Silkscreen Image

Figure 3. DAC8555EVM PCB—Layer 1 (Top Signal Layer)

SLAU204 –December 2006

DAC8555EVM User's Guide

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Contents DAC8555EVM Users Guide Overview PCB Design and Performance EVM Operation Schematic Reference Voltage FeaturesPower Requirements Supply VoltageEVM Basic Functions DAC8555EVM Functional Block Diagram PCB Layout PCB Design and PerformanceDAC8555EVM PCB-Top Silkscreen Image DAC8555EVM PCB-Layer 2 Ground Plane DAC8555EVM PCB-Layer 4 Bottom Signal Layer DAC8555EVM-Drill Drawing EVM PerformanceINL and DNL Characterization Graph of DAC a INL and DNL Characterization Graph of DAC B INL and DNL Characterization Graph of DAC C INL and DNL Characterization Graph of DAC D Bill of Materials DAC8555EVM Parts ListEVM Stacking Default SettingsFactory Default Jumper Settings Host Processor InterfaceDAC Output Channel Mapping Output Op AmpOutput Gain Unity Gain Output Jumper SettingsOutput Gain of 2 Jumper Settings Unity Gain OutputJumper Settings and Functions Optional Signal Conditioning Op-Amp U4BJumper Settings Capacitive Load Drive Output Jumper SettingsReference JMP12 JMP13 JMP14 JMP15 JMP16 Schematic Ti a Evaluation BOARD/KIT Important Notice FCC WarningImportant Notice