Texas Instruments DAC8555EVM manual Unity Gain Output Jumper Settings, Output Gain

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EVM Operation

3.4.1Unity Gain Output

The buffered output configuration can be used to prevent loading of the DAC8555, though it may add some slight distortion because of the feedback resistor and capacitor. The feedback circuit can be altered by simply desoldering R8 and C12 and replacing them with components of desired value. If desired, R8 and C12 can be removed altogether by replacing R8 with a 0Ω resistor.

Table 4 shows the jumper setting for the unity gain configuration of the DAC external output buffer in unipolar or bipolar mode.

Table 4. Unity Gain Output Jumper Settings

 

Jumper Setting

 

Reference

Unipolar

Bipolar

Function

JMP5

Open

Open

Disconnect VREFH from the inverting input of the op amp.

JMP10

2-3

1-2

Supplies VSS to the negative rail of the op amp or ties it to AGND.

JMP6

Open

Open

Disconnect negative input of op amp from the gain resistor, R9.

3.4.2Output Gain of 2

There are two types of configurations that will yield an output gain of 2, depending on the setup of jumpers JMP5 and JMP6. These configurations allow the user to choose whether the DAC output will use VREFH as an offset. Table 5 shows the proper jumper settings of the EVM for the DAC8555 output gain of 2.

Table 5. Output Gain of 2 Jumper Settings

 

Jumper Setting

Reference

Unipolar

Bipolar

 

Close

Close

JMP5

 

 

 

Open

Open

JMP10

2-3

1-2

 

Close

Close

JMP6

 

 

 

Open

Open

Function

Inverting input of the output op amp U2 is connected to VREFH for use as its offset voltage with a gain of 2. JMP6 must be open.

VREFH is disconnected from the inverting input of the output op amp U2. JMP6 must be closed.

Supplies power, VSS, to the negative rail of op amp U2 for bipolar mode, or ties it to AGND for unipolar mode.

Configures op amp U2 for a gain of 2 output without a voltage offset. JMP5 must be open.

Inverting input of op amp U2 is disconnected from the gain resistor, R9. JMP5 must be closed.

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DAC8555EVM User's Guide

SLAU204 –December 2006

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Contents DAC8555EVM Users Guide Overview PCB Design and Performance EVM Operation Schematic Supply Voltage FeaturesPower Requirements Reference VoltageEVM Basic Functions DAC8555EVM Functional Block Diagram PCB Design and Performance PCB LayoutDAC8555EVM PCB-Top Silkscreen Image DAC8555EVM PCB-Layer 2 Ground Plane DAC8555EVM PCB-Layer 4 Bottom Signal Layer EVM Performance DAC8555EVM-Drill DrawingINL and DNL Characterization Graph of DAC a INL and DNL Characterization Graph of DAC B INL and DNL Characterization Graph of DAC C INL and DNL Characterization Graph of DAC D DAC8555EVM Parts List Bill of MaterialsHost Processor Interface Default SettingsFactory Default Jumper Settings EVM StackingOutput Op Amp DAC Output Channel MappingUnity Gain Output Unity Gain Output Jumper SettingsOutput Gain of 2 Jumper Settings Output GainCapacitive Load Drive Output Jumper Settings Optional Signal Conditioning Op-Amp U4BJumper Settings Jumper Settings and FunctionsReference JMP12 JMP13 JMP14 JMP15 JMP16 Schematic Ti a FCC Warning Evaluation BOARD/KIT Important NoticeImportant Notice