Texas Instruments manual DAC8555EVM Functional Block Diagram

Page 5

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Overview

JMP16

VCC

 

VSS

+3.3VA

 

VDD

External

+5VA

Reference

 

Module

 

JMP8

 

TP2

 

(J1)

(J5)

(J3A)

(J3B)

VCC

GND

VSS

GND

VDD

+5VA

+3.3VA

RSTSEL

RST

EN

 

 

JMP15

(J4A)

 

 

 

 

 

 

Output

 

(J4B)

8￿CH

 

 

 

 

Buffer

 

 

 

DAC￿Out

Module

JMP5

 

 

 

 

 

 

VREFH

 

 

JMP6

 

 

 

JMP10

 

 

 

JMP11

JMP12

JMP13

JMP14

4￿CH

TP4

VREFH

DAC￿Module

RST RSTSEL VREFL

JMP4 JMP3

JMP9

(J2A)

(J2B)

TP3

DIN LDAC SCLK SYNC

VSS

Figure 1. DAC8555EVM Functional Block Diagram

SLAU204 –December 2006

DAC8555EVM User's Guide

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Contents DAC8555EVM Users Guide Overview PCB Design and Performance EVM Operation Schematic Power Requirements FeaturesSupply Voltage Reference VoltageEVM Basic Functions DAC8555EVM Functional Block Diagram PCB Layout PCB Design and PerformanceDAC8555EVM PCB-Top Silkscreen Image DAC8555EVM PCB-Layer 2 Ground Plane DAC8555EVM PCB-Layer 4 Bottom Signal Layer DAC8555EVM-Drill Drawing EVM PerformanceINL and DNL Characterization Graph of DAC a INL and DNL Characterization Graph of DAC B INL and DNL Characterization Graph of DAC C INL and DNL Characterization Graph of DAC D Bill of Materials DAC8555EVM Parts ListFactory Default Jumper Settings Default SettingsHost Processor Interface EVM StackingDAC Output Channel Mapping Output Op AmpOutput Gain of 2 Jumper Settings Unity Gain Output Jumper SettingsUnity Gain Output Output GainJumper Settings Optional Signal Conditioning Op-Amp U4BCapacitive Load Drive Output Jumper Settings Jumper Settings and FunctionsReference JMP12 JMP13 JMP14 JMP15 JMP16 Schematic Ti a Evaluation BOARD/KIT Important Notice FCC WarningImportant Notice