Texas Instruments DAC8555EVM manual Ti a

REVISION HISTORY

REV

ENGINEERING CHANGE NUMBER

APPROVED

JMP7

+5VA

+3.3VA

VDD

1 2 3

D

AVDD

VCC

D

VDD

C11

1uF

R1

R2

R3

R4

R5

R6

7

10K

10K

10K

10K

NI

NI

C5

C2

U2_+IN

R14

0.1uF

10uF

C7

C3

3

U2

0

0.1uF

10uF

6

U2_OUT

R24

1 2 3

JMP5

100

1

U2_-IN

2

OPA627AU

U1

2

4

12

AVDD

IO_V/DVDD

JMP15

5

OPA IN

1

3

J4A

R7

4

VrefH

VrefH

LDAC

16

LDAC

2

A0(+)

A0(-)

1

10K

VSS

JMP11

4

3

ENABLE

A1(+)

A1(-)

15

ENABLE

1

6

5

3 2 1

5

OUT_A

2

8

A2(+)

A2(-)

7

RSTSEL

VrefL

VrefL

A3(+)

A3(-)

JMP10

14

3

10

9

RSTSEL

A4

AGND

OUT A

12

11

RST

A5

AGND

VrefH

C10

13

14

13

RST

A6

AGND

16

15

1uF

2

2

2

2

JMP12

-REFin

A7

VCOM

18

17

SDI

R11

0

1

REF-

AGND

JMP1

JMP2

JMP3

JMP4

11

Din

OUT_B

+REFin

20

19

R8

1

2

REF+

AGND

SCLK

R12

0

10

VoutA

3

SCLK

OUTPUT HEADER

10K

1

1

1

1

VoutB

2

OUT B

C

SYNC

9

C

SYNC

C12

VoutC

7

OUT_C

1 JMP13

6

8

OUT_D

J4A (TOP) = SAM_TSM-110-01-L-DV-P

1nF

GND

VoutD

2

3

J4B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K

2

JMP6

1

R9

DAC8555IPW

OUT C

10K

VCC

1 JMP14

3 2 1

2

3

OUT D

JMP16

U3

VCC

OPA OUT

2

6

TP1

VIN

VOUT

REF OUT

C6

3

GND

5

TEMP

TRIM

3

0.1uF

C1

C4

8

10uF

0.1uF

REF02AU

R15

4

2

2

3

1

100K

2

JMP8 1

1

3

U4A

R10 20K

2

1

OPA2132UA

VrefH

3

4

B

R16

+REFin

TP2

J2A

B

20k

EXTERNAL

1

2

LDAC

REFERENCE

SCLK

CNTL

GPIO0

TP3

3

4

-REFin

NOTE: Voltage range of -REFin input should not exceed

CLKX

DGND

R13

5

6

JMP9

0 - VrefH.

SYNC

7

CLKR

GPIO1

8

ENABLE

0

FSX

GPIO2

3

9

10

SDI

FSR

DGND

2

11

12

VrefL

DX

GPIO3

RSTSEL

1

13

14

DR

GPIO4

TP4

15

16

INT

SCL

17

18

C8

RST

TOUT

DGND

AGND

19

20

GPIO5

SDA

NI

DAUGHTER-SERIAL

R17

R18

NI

J2A (TOP) = SAM_TSM-110-01-L-DV-P

J2B (BOTTOM) = SAM_SSW-110-22-F-D-VS-K

NI

U4B

TP5

R19 NI

5

R23

+Vin

R20 NI

7

+3.3VD +1.8VD

+5VA

VCC

VSS

-5VA

+3.3VA

VDD

J1

J5

TP6

6

NI

-Vin

OPA2227UA

ti A

J3A

R21

1

+VA

-VA

2

NI

R22

3

4

1

2

3

1

2

3

+5VA

-5VA

NI

5

6

A

DGND

AGND

7

+1.8VD

VD1

8

C9

DATA ACQUISITION PRODUCTS

9

10

+3.3VD

+5VD

HIGH-PERFORMANCE ANALOG DIVISION

DAUGHTER-POWER

NI

SEMICONDUCTOR GROUP

VSS

VCC

VDD

+5VA

6730 SOUTH TUCSON BLVD., TUCSON, AZ 85706 USA

VCC = +15V Analog

ENGINEER

J. PARGUIAN

TITLE

DAC8555EVM

VDD = +2.7V to +5.0V Digital

J3A (TOP) = SAM_TSM-105-01-L-DV-P

VSS = 0V to -15V Analog

DRAWN BY

R. BENJAMIN

J3B (BOTTOM) = SAM_SSW-105-22-F-D-VS-K

DOCUMENT CONTROL NO6486604.

SIZE B

DATE11-Oct-2006

REV A

SHEET

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