Checkpoint

Description

 

 

C0

Early CPU Init Start -- Disable Cache ?C Init Local APIC

 

 

C1

Set up boot strap processor Information

 

 

C2

Set up boot strap processor for POST

 

 

C5

Enumerate and set up application processors

 

 

C6

Re-enable cache for boot strap processor

 

 

C7

Early CPU Init Exit

 

 

0A

Initializes the 8042 compatible Key Board Controller

 

 

0B

Detects the presence of PS/2 mouse.

 

 

0C

Detects the presence of Keyboard in KBC port.

 

 

0E

Testing and initialization of different Input Devices. Also, update the Kernel Variables.Traps

 

the INT09h vector, so that the POST INT09h handler gets control for IRQ1. Uncompress

 

all available language, BIOS logo, and Silent logo modules.

 

 

13

Early POST initialization of chipset registers.

 

 

24

Uncompress and initialize any platform specific BIOS modules. GPNV is initialized at this

 

checkpoint.

 

 

30

Initialize System Management Interrupt.

 

 

2A

Initializes different devices through DIM. See DIM Code Checkpoints section of document

 

for more information.

 

 

2C

nitializes different devices. Detects and initializes the video adapter installed in the system

 

that have optional ROMs.

 

 

2E

Initializes all the output devices.

 

 

31

Allocate memory for ADM module and uncompress it. Give control to ADM module for

 

initialization. Initialize language and font modules for ADM. Activate ADM module.

 

 

33

Initializes the silent boot module. Set the window for displaying text information.

 

 

37

Displaying sign-on message, CPU information, setup key message, and any OEM specific

 

information.

 

 

38

Initializes different devices through DIM. See DIM Code Checkpoints section of document

 

for more information. USB controllers are initialized at this point.

 

 

39

Initializes DMAC-1 & DMAC-2.

 

 

3A

Initialize RTC date/time.

 

 

3B

Test for total memory installed in the system. Also, Check for DEL or ESC keys to limit

 

memory test. Display total memory in the system.

 

 

3C

Mid POST initialization of chipset registers.

 

 

40

Detect different devices (Parallel ports, serial ports, and coprocessor in CPU, ?? etc.)

 

successfully installed in the system and update the BDA, EBDA??etc.

 

 

50

Programming the memory hole or any kind of implementation that needs an adjustment in

 

system RAM size if needed.

 

 

43

Chapter 4

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Acer M5810 manual Early CPU Init Start -- Disable Cache ?C Init Local Apic