Interrupt control register BASE+20H | Advantech PCI-1784 instruction

C.6 Interrupt control register — BASE+20H

Table C-5 PCI-1784 Register for interrupt control

Base Addr.		15	14	13	12	11	10	9		8	7	6	5	4	3	2	1	0

		31	30	29	28	27	26	25		24	23	22	21	20	19	18	17	16
		31	30	29	28	27	26	25		24	23	22	21	20	19	18	17	16

									Interrupt control
20H	W
20H	W	DI3	DI2	DI1	DI0	IX3	IX2	IX1		IX0	UN3	UN2	UN1	UN0	OV3	OV2	OV1	OV0

		IE			TM						UC3	UC2	UC1	UC0	OC3	OC2	OC1	OC0

OVn	Interrupt by overflow bit (n: 0 ~ 3)
	0	Disable
	1	Enable
UNn	Interrupt by underflow bit (n: 0 ~ 3)
	0	Disable
	1	Enable
IXn	Interrupt by index status bit (n: 0 ~ 3)
	0	Disable
	1	Enable
DIn	Interrupt by digital input bit (n: 0 ~ 3)
	0	Disable
	1	Enable
OCn	Interrupt by counter over compare bit (n: 0 ~ 3)
	0	Disable
	1	Enable
UCn	Interrupt by counter under compare bit (n: 0 ~ 3)
	0	Disable
	1	Enable
TM	Interrupt by timer pulse bit
	0	Disable
	1	Enable
IE	Overall interrupt enable bit
	0	Disable
	1	Enable

37

Image 41

Advantech specifications Interrupt control register BASE+20H, Table C-5 PCI-1784 Register for interrupt control

Contents

Page Page Contents Appendix D. Operation Encoder Interface FeaturesIntroduction Digital Input and Interrupts CountersFlexible Digital Output function Special Shielded Cable for Noise Reduction Board ID Applications Installation Guide Installation Flow Chart Register-level Programming Software OverviewDevice Drivers Programming Tools Device Drivers Programming Roadmap Programming with Device Drivers Function Library Troubleshooting Device Drivers Error Wiring Boards AccessoriesWiring Cable Unpacking InstallationPage Setup Screen of Advantech Automation Software Driver Installation Select the Individual Drivers option Hardware InstallationPage Device name listed on the Device Manager Board selection Device Setup & Configuration ‘Setup’ dialog box Setting Up and configure the device Operation dialog box Switch and Jumper Settings Signal ConnectionsOverview Names of Jumpers Function description Board ID setting SW1 Pin Assignment Signal ConnectionsConnector Signal Description Single ended Outputs Encoder Quadrature encoder input Quadrature encoder up/down counter input connections Isolated digital output Isolated digital input Encoder Output Appendix A. SpecificationsTimer General InterruptCounter Latch ADDRESS, Control and Data BUS Appendix B. Block DiagramPage I/O Port Address Map Appendix C. Register Structure and Format + HEX Table C-1 PCI-1784 register format Part 1CH Clock Control Table C-2 PCI-1784 Register for counter 0/1/2/3 mode Counter 0/1/2/3 mode BASE+00/04/08/0CH DI0 Table C-3 PCI-1784 Register for counter 0/1/2/3 latch data Counter 0/1/2/3 latch data BASE+00/04/08/0CH Table C-4 PCI-1784 Register for counter 0/1/2/3 compare data Counter 0/1/2/3 compare data BASE+10/14/18/1CH Table C-5 PCI-1784 Register for interrupt control Interrupt control register BASE+20H Table C-6 PCI-1784 Register for interrupt status Interrupt status register BASE+20H Table C-7 PCI-1784 Register for clock control Clear Interrupt BASE+24H Table C-8 PCI-1784 Register for clear interrupt Table C-9 PCI-1784 Register for software latch Software latch BASE+28H Table C-10 PCI-1784 Board ID data Board ID BASE+28H Table C-11 PCI-1784 Register for reset counter Reset counter BASE+2CH Table C-12 PCI-1784 Register for digital output Digital output BASE+30H Table C-13 PCI-1784 Register for digital input/output Digital input/output BASE+30HPage Quadrature encoder introduction Appendix D. Operation Quadrature input counter mode Mode Maximum input rate 8MHz 4MHz 2MHz 1MHzCounter modes Single-ended vs. differential input Pulse/direction mode Pulse modeDisabled mode Digital noise filter Clock frequency Maximum width Latch modeLatch Index latch Timer function Counter reset value Interrupt function