37
C.6 Interrupt control register — BASE+20H
Table C-5 PCI-1784 Register for interrupt control
1514131211109876543210
Base Addr. 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Interrupt control
DI3 DI2 DI1 DI0 IX3 IX2 IX1 IX0 UN3 UN2 UN1 UN0 OV3 OV2 OV1 OV0
20H W
IE TM UC3 UC2 UC1 UC0 OC3 OC2 OC1 OC0
OVn Interrupt by overflow bit (n: 0 ~ 3)
0Disable
1Enable
UNnInterrupt by underflow bit (n: 0 ~ 3)
0Disable
1Enable
IXnInterrupt by index status bit (n: 0 ~ 3)
0Disable
1Enable
DIn Interrupt by digital input bit (n: 0 ~ 3)
0Disable
1Enable
OCnInterrupt by counter over compare bit (n: 0 ~ 3)
0Disable
1Enable
UCn Interrupt by counter under compare bit (n: 0 ~ 3)
0Disable
1Enable
TM Interrupt by timer pulse bit
0Disable
1Enable
IE Overall interrupt enable bit
0Disable
1Enable