Appendix B. Block Diagram | Advantech PCI-1784 instruction

Appendix B. Block Diagram

ADDRESS, CONTROL AND DATA BUS

32-BIT

CO UNTER

DIG ITAL

UP/DOW N

M ODE

FILTER

CO UNTER

CO NTROL

CIRCUIT

32-BIT MULTI-MODE

INPUT

UP/DOW N COUNTER

ISOLATIONDIFF/SE

32-BIT MULTI-MODE

UP/DOW N COUNTER

32-BIT MULTI-MODE

UP/DOW N COUNTER

PRO GRAMM ABLECONTROL

TIM E -BASE

GENERATOR

UNIT INTERRUPT CONTROLLER

PCI INTERFACE

PCI BUS

CH .0 PHASE A

CH .0 PHASE B CH .0 INDEX

CH .1 PHASE A

CH .1 PHASE B CH .1 INDEX

CH .2 PHASE A

CH .2 PHASE B CH .2 INDEX

CH .3 PHASE A

CH .3 PHASE B CH .3 INDEX

DO /I CH .0

DO /I CH .1

DO /I CH .2 DO /I CH .3

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Image 31

Advantech PCI-1784 specifications Appendix B. Block Diagram, ADDRESS, Control and Data BUS

Contents

Page Page Contents Appendix D. Operation Introduction FeaturesEncoder Interface Special Shielded Cable for Noise Reduction CountersDigital Input and Interrupts Flexible Digital Output function Board ID Applications Installation Guide Installation Flow Chart Device Drivers Software OverviewRegister-level Programming Programming Tools Device Drivers Programming Roadmap Programming with Device Drivers Function Library Troubleshooting Device Drivers Error Wiring Cable AccessoriesWiring Boards Unpacking InstallationPage Setup Screen of Advantech Automation Software Driver Installation Select the Individual Drivers option Hardware InstallationPage Device name listed on the Device Manager Board selection Device Setup & Configuration ‘Setup’ dialog box Setting Up and configure the device Operation dialog box Names of Jumpers Function description Signal ConnectionsSwitch and Jumper Settings Overview Board ID setting SW1 Connector Signal Description Signal ConnectionsPin Assignment Single ended Outputs Encoder Quadrature encoder input Quadrature encoder up/down counter input connections Isolated digital output Isolated digital input Timer Appendix A. SpecificationsEncoder Output Counter Latch InterruptGeneral ADDRESS, Control and Data BUS Appendix B. Block DiagramPage I/O Port Address Map Appendix C. Register Structure and Format + HEX Table C-1 PCI-1784 register format Part 1CH Clock Control Table C-2 PCI-1784 Register for counter 0/1/2/3 mode Counter 0/1/2/3 mode BASE+00/04/08/0CH DI0 Table C-3 PCI-1784 Register for counter 0/1/2/3 latch data Counter 0/1/2/3 latch data BASE+00/04/08/0CH Table C-4 PCI-1784 Register for counter 0/1/2/3 compare data Counter 0/1/2/3 compare data BASE+10/14/18/1CH Table C-5 PCI-1784 Register for interrupt control Interrupt control register BASE+20H Table C-6 PCI-1784 Register for interrupt status Interrupt status register BASE+20H Table C-7 PCI-1784 Register for clock control Clear Interrupt BASE+24H Table C-8 PCI-1784 Register for clear interrupt Table C-9 PCI-1784 Register for software latch Software latch BASE+28H Table C-10 PCI-1784 Board ID data Board ID BASE+28H Table C-11 PCI-1784 Register for reset counter Reset counter BASE+2CH Table C-12 PCI-1784 Register for digital output Digital output BASE+30H Table C-13 PCI-1784 Register for digital input/output Digital input/output BASE+30HPage Quadrature encoder introduction Appendix D. Operation Single-ended vs. differential input Mode Maximum input rate 8MHz 4MHz 2MHz 1MHzQuadrature input counter mode Counter modes Digital noise filter Pulse modePulse/direction mode Disabled mode Index latch Latch modeClock frequency Maximum width Latch Timer function Counter reset value Interrupt function