9.5 Chipset Features Setup

Note:

It is strongly recommended that setup items in this

 

 

section NOT be changed, because advanced

 

 

knowledge is required to effect such changes.

 

 

 

 

 

 

Figure 9-4: Chipset features setup screen

System BIOS Cacheable

When enabled, allows the ROM area FOOOH-FFFFH to be cacheable when the cache controller is activated. The recommended setting is "Disabled", especially for high speed CPUs (200 MHz and above).

Video BIOS Cacheable

When enabled, allows the system to use the video BIOS codes from SRAMs, instead of the slower DRAMs or ROMs.

The options are: Enabled (Default), Disabled.

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PPC-150

User's Manual

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Advantech PPC-150 manual Chipset Features Setup, Knowledge is required to effect such changes