BenQ PE8700 CP UD0 CP UD1 CP UD2 CP UD3 CP UD4 CP UD5 CP UD6 CP UD7, Resetn SDA SCL, Writeprot

5 4

3

2 +3VS 1

D

CPU_D[0..7]

CPU_D[0..7]

CP U_D0 CP U_D1 CP U_D2 CP U_D3 CP U_D4 CP U_D5 CP U_D6 CP U_D7

RESET_N

SDA

SCL

FAN_CTRL

DMD_SCL

DMD_SDA

+3VS

R114R115

5.1K 5.1K

RESET_N

SDA SCL

R122 0

R123 0

+3VS

PIO1 R38 33

SDA

SCL

R39 R40

10K 10K

	U6			R35	R36	R37
1	NC	VCC	8	5.1K	2K	2K
2			7
	NC	WP
3			6
	NC	SCL
4			5
	GND	SDA
	AT24C16
								KEY_LED2
								KEY_LED1
								CPU_A[0..19]
								CPU_D[0..15]
					WRITE_PROT			WRITE_PROT
				+3VS		+3VS		+3VS
R41	R42
10K	10K R43					R45	R44	R105
						R46	5.1K	2K
						5.1K		POWER

D

CPU_A[0..7]

CPU_A0 CPU_A1 CPU_A2 CPU_A3 CPU_A4 CPU_A5 CPU_A6 CPU_A7

CPU_PCS0_N

CPU_PCS0_N

Note: Instead of KM616V1000B, IS61LV25616-12T (256K x 16 bit 4M) can be stuffed for debug.

R47 R48

10K 10K

+3VS

(PIO12) (PIO13)	(PIO10)		CPUMCS3 N CPUMCS2 N	(PIO17) POWERONTEST (PIO18) (PIO19)	PUCLCS N CPUUCS N	(INT1)
						INT1CPU
TMRIN0CPU		TMRIN1CPU		PORTPIO
	(PIO1)
						INT2

NC_R0603 5.1K 2

	PIO17_1	R49	33		PIO17_2		1	Q28
								2N2907
							3
	PIO19	+3VS					R50	33		DLP_RST
							R51	33
		U8A								BACKLIGHT_CTRL
		14	74HC132					R52	2K
										+5VS
			1	E11	TP37
INT0	3
			2	I R_IN		R53	33
										IR

	7	C72
(PIO2)		470PF
		LAMPLIT

C

B

A

	CPU_A5		1						44	CPU_A6																									RM1_IRQ			RM1_IRQ
				A4				A5
																										+3VS
	CPU_A4		2						43	CPU_A7																										+3VS
	CPU_A3		3	A3			U9	A6	42	CPU_A8							77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53
				A2				A7
	CPU_A2		4	A1	IS61LV25616-12T			OE#	41	CPU_RD_N
	CPU_A1		5	A0				UB#	40	CPU_BHE_N							DRQ0/INT5 DRQ1/INT6 TMRIN0 TMROUT0 TMROUT1 TMRIN1/PIO0 RES GND MCS3/RFSH MCS2 VCC PCS0 PCS1 GND PCS2/CTS1/ENRX1 PCS3/RTS1/RTR1 VCC PCS5/A1 PCS6/A2 LCS/ONCE0 UCS/ONCE1 INT0 INT1/SELECT INT2/INTA0/PWD INT3/INTA1/IRQ									R54									R55	R56	R57
	CP U_D4	13		I/O5			I/O12		32	CPU_D11			CPU_D10		83	AD10								DT/R	48		PIO4		(PIO4)									KEY_LED0
	CPU_LCS_N		6	CS#				LB#	39	CPU_A0																												C
	CP U_D0		7	I/O1			I/O16		38	CPU_D15																NC_R0603
	CP U_D1		8	I/O2			I/O15		37	CPU_D14			CP U_D0		78	AD0																			5.1K	5.1K	NC_0603
	CP U_D2		9	I/O3			I/O14		36	CPU_D13			CP U_D8		79	AD8								INT4	52	INT4					R58	33
	CP U_D3	10		I/O4			I/O13		35	CPU_D12			CP U_D1		80	AD1								MCS1	51	CPU_MCS1_N						R119		33				BALLAST_CTRL
		11							34				CP U_D9		81										50	RM1_CS_N
	+3VS			VCC				VSS								AD9								MCS0														RM1_CS_N
		12							33				CP U_D2		82										49		PIO5		(PIO5)				R59		33
				VSS				VCC			+3VS					AD2								DEN/DS														MUX_SEL_Q
	CP U_D5	14		I/O6			I/O11		31	CPU_D10			CP U_D3		84	AD3								NMI	47	CPU_NMI R61 0							R60		33
	CP U_D6	15							30	CP U_D9			CPU_D11		85										46				(PIO6)		SYNVAL							SYNCVALID
				I/O7			I/O10									AD11								SRDY		CP U_HOLD	R62 1K
	CP U_D7	16		I/O8				I/O9	29	CP U_D8			CP U_D4		86	AD4								HOLD	45
	CPU_WR_N	17							28				CPU_D12		87										44	CPU_HLDA				E1				R117	33
				WE#				NC								AD12								HLDA
	CPU_A16	18							27	CPU_A9			CP U_D5		88										43	CPU_WLB			1	TP40
				A15				A8								AD5								WLB
	CPU_A15	19							26	CPU_A10					89										42	CPU_WHB			1
				A14				A9								GND								WHB						TP41
	CPU_A14	20							25	CPU_A11			CPU_D13		90						U10				41				E1
				A13				A10								AD13								GND
	CPU_A13	21							24	CPU_A12			CP U_D6		91						RDC8820				40	CPU_A0
				A12				A11								AD6								A0
	CPU_A17	22							23	CPU_A18					92										39	CPU_A1
				NC				NC					CPU_D14			VCC								A1
															93										38
																AD14								VCC
			(128KBytes SRAM)										CP U_D7		94										37	CPU_A2
																AD7								A2
													CPU_D15		95	AD15								A3	36	CPU_A3							CPU_D[0..15]
													E1	TP42	96										35	CPU_A4
																S6/LOCK/CLKDIV2								A4
														1CPU_UZI	97										34	CPU_A5
																UZI								A5
													CPU_TXD1		98										33	CPU_A6
																TXD1								A6
													CPU_RXD1		99										32	CPU_A7
																RXD1								A7
															100										31	CPU_A8
													CPU_RXD0			CTS0/ENRX0								A8									CPU_A[0..19]
CPU_RXD0															1										30	CPU_A9
													CPU_TXD0		2	RXD0	RTS0/RTR0 BHE/ADEN WR RD ALE ARDY S2 S1 S0 GND X1 X2 VCC CLKOUTA CLKOUTB GND A19 A18 VCC A17 A16 A15 A14 A13 A12							A9	29	CPU_A10
CPU_TXD0	CPU_A17															TXD0								A10	28	CPU_A11					CPU_A1	2	2	42	42	CPU_A11
														+3VS										A11									J3
																															CPU_A0	1			41	CPU_A10
														(PIO21)																			1	41
	CPU_A15		2	A14				BYTE#	47						10K		3 4 5 6 7 8 9			10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27											CPU_A5	6			46	CPU_A15
											+3VS																						6	46
																															CPU_A2	3	3	43	43	CPU_A12
																															CPU_A3	4	4	44	44	CPU_A13
	CPU_A16		1	A15				A16	48						R63																CPU_A4	5	5	45	45	CPU_A14
	CPU_A14		3	A13				VSS	46																						CPU_A6	7	7	47	47	CPU_A16		Link to test
	CPU_A13		4						45	CPU_D15					C PU_ARDYN																CPU_A7	8			48	CPU_A17
	CPU_A12		5	A12			DQ15/A-1		44	CP U_D7							_	ALECPU S2CPU	S1CPU			CLKOUTB				CPU_A14					CPU_A8	9	8	48	49	CPU_A18
	CPU_WR_N		11	NC				DQ12	38	CP U_D4							PUC BHE														CP U_D3	15	14	54	55	CPU_D11
	CPU_A11		6	A11				DQ7	43	CPU_D14																					CPU_A9	10	9	49	50	CPU_A19		board.
				A10				DQ14													CPUCLKOUTA												10	50
	CPU_A10		7	A6				DQ8	42	CP U_D6				CLKDIVANTI1 BUFFERMUX1			(PIO20)			CPUS0											CPU_S1	11	23	63	51	FLASH1_CE
	CPU_A7		19						30	CP U_D8																						23			63
	CPU_A9		8	A9				DQ6	41	CPU_D13																					CP U_D0	12	11	51	52	CP U_D8
	10K HI_A19		9	A8				DQ13	40	CP U_D5																CPU_A12					CP U_D1	13	12	52	53	CP U_D9		B
+3VS	R65		10	A19				DQ5	39	CPU_D12																CPU_A13					CP U_D2	14	13	53	54	CPU_D10
			13	WE#				DQ4	36	CPU_D11								1				CPU				CPU_A16					CP U_D5	17	15	55	57	CPU_D13
				RESET#				VCC																									16	56
			12						37																	CPU_A15					CP U_D4	16			56	CPU_D12
			14	NC				DQ11	35	CP U_D3												1E1				CPU_A17					CP U_D6	18	17	57	58	CPU_D14
				NC				DQ3											E1														18	58
			15						34	CPU_D10																CPU_A18					CP U_D7	19			59	CPU_D15
				RY/BY#				DQ10																									19	59
	CPU_A19		16				U12		33	CP U_D2																CPU_A19						20			60
				A18				DQ2																									20	60
	CPU_A18		17						32	CP U_D9								TP43													RESETVCC	21			61	POWERON_TEST
				A17				DQ9														TP44						RESETVCC					21	61
	CPU_A8		18	A7		AM29LV160DT-90EI			31	CP U_D1																					CPU_S0	22	22	62	62	CPU_UCS_N
								DQ1														CPUX1		CPU X2
	CPU_A6		20	A5				DQ0	29	CP U_D0																					CPU_S2	24	24	64	64	RESET_N
	CPU_A3		23						26	CPU_RD_N						PIO20															SDA	27			67	RM1CLKIN
				A3				VSS																									26	66
	CPU_A5		21	A4				OE#	28													R67										25	25	65	65	RM1_IRQ
	CPU_A4		22						27													1M									SCL	26			66
	CPU_A2		24	A2				CE#	25													X2									CP U_HOLD	28	27	67	68	CPU_WR_N
				A1				A0																									28	68
																						25MHZ									CPU_HLDA	29			69	CPU_RD_N
																																	29	69
	+3VS		(256K x 16Bit FLASH)									R68																			CPU_BHE_N	30			70	CPU_MCS1_N
										FLASH1_CE			CPU_UCS_N										2										30	70
	CPU_A1																														RM1_CS_N	31	31	71	71	CPU_MCS2_N
	R69																					3		1							CPU_LCS_N	32			72	CPU_MCS3_N
												NC_R0603																					32	72				+3VS
																																33			73
																						C75		C76							CPU_RXD0		33	73
																							4									34			74			+3VS
																																	34	74
																					R70										CPU_TXD0	35			75
																																	35	75
	10K																					20PF		20PF							CPU_RXD1	36			76			+3VA
																																	36	76
CPU_WR_N	CPU_WR_N																				33		YXC								CPU_TXD1	37			77
																																	37	77
	CPU_RD_N																															38			78
CPU_RD_N																								L6							+5VS		38	78
																																39			79			+5VA
																																	39	79
																																40			80
	ANTI_CLKDIV							(PIO29)				R71	33											Z1000/100MHZ					+5VS				40	80
																																AMP 80PIN D0.6
	MUX_BUFFER											R72	33
MUX_BUFFER								(PIO21)																														+12VA
MUX_SEL_P	MUX_SEL_P	(PIO20)												R73	33
RM1CLKIN
							1								Note: Infra-Red generates two interrupts: at the rising edge and at the falling edge,
							TP45
									+3VS						for IR signal decoding.																							A

The RM1_WR_N is

+3VS

delayed by 2 gates

U7B

14

U7C

14

+3VS

Benq Corporation

because the data

4

9

should be stable

RM1_WR_N

CPU_DELAY2 6

5

CPU_DELAY1 8

10

CPU_WR_

N

22UF/16

C78

C79

C80

C81

C82

C83

C84

C85

C86

C87

Project Code

Model Name

OEM/ODM Model Name

R74

33

C77

during the falling

+

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

0.1UF

99.J5877.001

HT720G

NA

edge of the WRITE

74VHC32

7

74VHC32

7

Title

MAIN BOARD

signal.

Size

PCB P/N

PCB Rev.

Document Number

Rev.

<Size>

48.J5801.S02

S02

99.J5877.R22-C3-304-001

0

Date: Thursday, January 16, 2003

Sheet

7

o f 10

Prepared By

Reviewed By

Approved By

ANGEL HU

COLIN CHANG

BEN CHEN

5

4

3

2

1