Main
Cisco ONS 15454 SDH Reference Manual
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CONTENTS
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About this Guide
Revision History
Document Objectives
Audience
Document Organization
Related Documentation
Document Conventions
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xxxiii
xxxiv
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xxxvi
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Obtaining Optical Networking Information
Where to Find Safety and Warning Information
Cisco Optical Networking Product Documentation CD-ROM
Obtaining Documentation and Submitting a Service Request
Shelf and FMEC Hardware
1.1 Overview
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1.2 Front Door
1-4
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1.3 Front Mount Electrical Connection
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1.4 E1-75/120 Conversion Panel
1.5 Coaxial Cable
1.6 Twisted-Pair Balanced Cable
1.7 Cable Routing and Management
1.8 Fiber Management
1.9 Fan-Tray Assembly
1.9.1 Fan Speed
1.9.2 Air Filter
1.10 Power and Ground Description
1.11 Alarm, Timing, LAN, and Craft Pin Connections
1.12 Cards and Slots
1.12.1 Card Slot Requirements
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1.12.2 Card Replacement
1.13 Software and Hardware Compatibility
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Common Control Cards
2.1 Common Control Card Overview
2.1.1 Card Summary
2.1.2 Card Compatibility
2.1.3 Cross-Connect Card Compatibility
2.2 TCC2 Card
2-5
Chapter2 Common Control Cards 2.2 TCC2 Card
Note The TCC2 card supporst both 48 VDC and 60 VDC input requirements.
Figure 2-1 shows the TCC2 card faceplate and block diagram.
Figure2-1 TCC2 Faceplate and Block Diagram
2.2.1 TCC2 Card Functionality
2.2.2 TCC2 Card-Level Indicators
2.2.3 Network-Level Indicators
2.3 TCC2P Card
2-8
Chapter2 Common Control Car ds 2.3.1 TCC2P Functionality
Figure 2-2 shows the faceplate and block diagram for the TCC2P.
Figure2-2 TCC2P Faceplate and Block Diagram
2.3.1 TCC2P Functionality
2.3.2 TCC2P Card-Level Indicators
2.3.3 Network-Level Indicators
2.4 XC10G Card
2-11
Figure 2-3 shows the XC10G card faceplate and block diagram.
Figure2-4 XC10G Card Cross-Connect Matrix
Figure2-3 XC10G Card Faceplate and Block Diagram
Figure 2-4 shows the XC10G card cross-connect matrix.
2.5 XC-VXL-10G Card
2-13
Figure 2-5 shows the XC-VXL-10G faceplate and block diagram.
Figure2-6 XC-VXL-10G Cross-Connect Matrix
Figure 2-5 XC-VXL-10G Faceplate and Block Diagram
Figure 2-6 shows the XC-VXL-10G cross-connect matrix.
2.6 XC-VXL-2.5G Card
2-15
Figure 2-7 shows the XC-VXL-2.5G card faceplate and block diagram.
Figure2-8 XC-VXL-2.5G Cross-Connect Matrix
Figure2-7 XC-VXL-2.5G Faceplate and Block Diagram
Figure 2-8 shows the XC-VXL-2.5G cross-connect matrix.
2.7 AIC-I Card
2.7.1 AIC-I Card-Level Indicators
2.7.2 External Alarms and Controls
2.7.3 Orderwire
2.7.4 Power Monitoring
2.7.5 User Data Channel
2.7.6 Data Communications Channel
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Electrical Cards
3.1 Electrical Card Overview
3.1.1 Card Summary
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3.1.2 Card Compatibility
3.2 E1-N-14 Card
3.2.1 E1-N-14 Card Functionality
3.2.2 E1-N-14 Card-Level Indicators
3.2.3 E1-N-14 Port-Level Indicators
3.3 E1-42 Card
3.3.1 E1-42 Card Functionality
3.3.2 E1-42 Card-Level Indicators
3.3.3 E1-42 Port-Level Indicators
3.4 E3-12 Card
3.4.1 E3-12 Card Functionality
3.4.2 E3-12 Card-Level Indicators
3.4.3 E3-12 Port-Level Indicators
3.5 DS3i-N-12 Card
3.5.1 DS3i-N-12 Card Functionality
3.5.2 DS3i-N-12 Card-Level Indicators
3.5.3 DS3i-N-12 Port-Level Indicators
3.6 STM1E-12 Card
3.6.1 STM 1E-12 Card Functionality
3.6.2 STM1E-12 Card-Level Indicators
3.6.3 STM1E-12 Port-Level Indicators
3.7 BLANK Card
3.8 FMEC-E1 Card
3-16
3.9 FMEC-DS1/E1 Card
any Australian telecommunications network without the written consent of the network manager.
3.9.1 FMEC-DS1/E1 Card Connector Pinout
3.10 FMEC E1-120NP Card
3.10.1 FMEC E1-120NP Connector Pinout
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3.11 FMEC E1-120PROA Card
3.11.1 FMEC E1-120PROA Connector Pinout
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3.12 FMEC E1-120PROB Card
3.12.1 FMEC E1-120PROB Connector Pinout
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3.13 E1-75/120 Impedance Conversion Panel
3-27
Figure 3-13 shows the E1-75/120 with optional rackmount brackets installed.
Figure 3-14 shows a block diagram of the impedance conversion panel.
3.13.1 E1-75/120 Impedance Conversion Panel Functionality
3.14 FMEC-E3/DS3 Card
3.15 FMEC STM1E 1:1 Card
3.16 FMEC-BLANK Card
3.17 MIC-A/P FMEC
3.17.1 MIC-A/P Connector Pinouts
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3.18 MIC-C/T/P FMEC
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Optical Cards
4.1 Optical Card Overview
4.1.1 Card Summary
4.1.2 Card Compatibility
4.2 OC3 IR 4/STM1 SH 1310 Card
4-5
Chapter4 Optical Cards 4.2 OC3 IR 4/STM1 SH 1310 Card
Figure 4-1 shows the OC3 IR 4/STM1 SH 1310 faceplate.
Figure4-1 OC3 IR 4/STM1 SH 1310 Faceplate
4.2.1 OC3 IR 4/STM1 SH 1310 Functionality
4.2.2 OC3 IR 4/STM1 SH 1310 Card-Level Indicators
4.2.3 OC3 IR 4/STM1 SH 1310 Port-Level Indicators
4.3 OC3 IR/STM1 SH 1310-8 Card
4-8
Figure4-3 OC3 IR/STM1 SH 1310-8 Faceplate
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4.3.1 OC3 IR/STM1 SH 1310-8 Card-Level Indicators
4.3.2 OC3 IR/STM1 SH 1310-8 Port-Level Indicators
4-11
4.4 OC12 IR/STM4 SH 1310 Card
Figure4-5 OC12 IR/STM4 SH 1310 Faceplate and Block Diagram
4.4.1 OC12 IR/STM4 SH 1310 Card-Level Indicators
4.4.2 OC12 IR/STM4 SH 1310 Port-Level Indicators
4.5 OC12 LR/STM4 LH 1310 Card
4-13
Figure4-6 OC12 LR/STM4 LH 1310 Faceplate
4.5.1 OC12 LR/STM4 LH 1310 Card-Level Indicators
4.5.2 OC12 LR/STM4 LH 1310 Port-Level Indicators
4.6 OC12 LR/STM4 LH 1550 Card
4-16
Figure 4-8 shows the OC12 LR/STM4 LH 1550 faceplate and a block diagram of the card.
Figure4-8 OC12 LR/STM4 LH 1550 Faceplate and Block Diagram
4.6.1 OC12 LR/STM4 LH 1550 Card Functionality
4.6.2 OC12 LR/STM4 LH 1550 Card-Level Indicators
4.6.3 OC12 LR/STM4 LH 1550 Port-Level Indicators
4.7 OC12 IR/STM4 SH 1310-4 Card
4-18
Chapter4 Optical Cards 4.7 OC12 IR/STM4 SH 1310-4 Card
Figure4-9 OC12 IR/STM4 SH 1310-4 Faceplate
4.7.1 OC12 IR/STM4 SH 1310-4 Card Functionality
4.7.2 OC12 IR/STM4 SH 1310-4 Card-Level Indicators
4.7.3 OC12 IR/STM4 SH 1310-4 Port-Level Indicators
4.8 OC48 IR/STM16 SH AS 1310 Card
4-21
Figure4-11 OC48 IR/STM16 SH AS 1310 Faceplate
4.8.1 OC48 IR/STM16 SH AS 1310 Card Functionality
4.8.2 OC48 IR/STM16 SH AS 1310 Card-Level Indicators
4.8.3 OC48 IR/STM16 SH AS 1310 Port-Level Indicators
4.9 OC48 LR/STM16 LH AS 1550 Card
4-24
Figure4-13 OC48 LR/STM16 LH AS 1550 Faceplate
4.9.1 OC48 LR/STM16 LH AS 1550 Card Functionality
4.9.2 OC48 LR/STM16 LH AS 1550 Card-Level Indicators
4.9.3 OC48 LR/STM16 LH AS 1550 Port-Level Indicators
4.10 OC48 ELR/STM16 EH 100 GHz Cards
4-27
Figure4-15 OC48 ELR/STM16 EH 100 GHz Faceplate
4.10.1 OC48 ELR/STM16 EH 100 GHz Card Functionality
4.10.2 OC48 ELR/STM16 EH 100 GHz Card-Level Indicators
4.10.3 OC48 ELR/STM16 EH 100 GHz Port-Level Indicators
4.11 OC192 SR/STM64 IO 1310 Card
4-30
Figure4-17 OC192 SR/STM64 IO 1310 Faceplate
4.11.1 OC192 SR/STM64 IO 1310 Card Functionality
4.11.2 OC192 SR/STM64 IO 1310 Card-Level Indicators
4.11.3 OC192 SR/STM64 IO 1310 Port-Level Indicators
4.12 OC192 IR/STM64 SH 1550 Card
4-33
Figure 4-19 shows the OC192 IR/STM64 SH 1550 faceplate.
Figure4-19 OC192 IR/STM64 SH 1550 Faceplate
4.12.1 OC192 IR/STM64 SH 1550 Card Functionality
4.12.2 OC192 IR/STM64 SH 1550 Card-Level Indicators
4.12.3 OC192 IR/STM64 SH 1550 Port-Level Indicators
4.13 OC192 LR/STM64 LH 1550 Card
4-36
Figure4-21 OC192 LR/STM64 LH 1550 Faceplate and Block Diagram
!
4.13.1 OC192 LR/STM64 LH 1550 Card Functionality
!
!
4.13.2 OC192 LR/STM64 LH 1550 Card-Level Indicators
4.13.3 OC192 LR/STM64 LH 1550 Port-Level Indicators
4.14 OC192 LR/STM64 LH ITU 15xx.xx Card
RX
4.14.1 OC192 LR/STM64 LH ITU 15xx.xx Card Functionality
4.14.2 OC192 LR/STM64 LH ITU 15xx.xx Card-Level Indicators
4.14.3 OC192 LR/STM64 LH ITU 15xx.xx Port-Level Indicators
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Ethernet Cards
5.1 Ethernet Card Overview
5.1.1 Cards Summary
5.1.2 Card Compatibility
5.2 E100T-G Card
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5.2.1 E100T-G Slot Compatibility
5.2.2 E100T-G Card-Level Indicators
5.2.3 E100T-G Port-Level Indicators
5.3 E1000-2-G Card
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5.3.1 E1000-2-G Compatibility
5.3.2 E1000-2-G Card-Level Indicators
5.3.3 E1000-2-G Port-Level Indicators
5-7
Chapter5 Ethernet Cards 5.4 G1000-4 Card
5.4 G1000-4 Card
Figure 5-3 G1000-4 Faceplate and Block Diagram
5.4.1 G1000-4 Card-Level Indicators
5.4.2 G1000-4 Port-Level Indicators
5.4.3 G1000-4 Compatibility
5.5 G1K-4 Card
5-9
Chapter5 Ethernet Cards 5.5.1 G1K-4 Compatibility
Figure 5-4 shows the card faceplate and the block diagram of the card.
Figure5-4 G1K-4 Faceplate and Block Diagram
5.5.1 G1K-4 Compatibility
5.5.2 G1K-4 Card-Level Indicators
5.5.3 G1K-4 Port-Level Indicators
5.6 ML100T-12 Card
5.6.1 ML100T-12 Card-Level Indicators
5.6.2 ML100T-12 Port-Level Indicators
5.6.3 ML100T-12 Slot Compatibility
5.7 ML1000-2 Card
5.7.1 ML1000-2 Card-Level Indicators
5.7.2 ML1000-2 Port-Level Indicators
5.7.3 ML1000-2 Slot Compatibility
5.8 GBICs and SFPs
5.8.1 Compatibility by Card
5.8.2 GBIC Description
5.8.2.1 DWDM and CWDM GBICs
5.8.2.1.1 Placement of CWDM or DWDM GBICs
5.8.2.1.2 Example of CWDM or DWDM GBIC Application
5.8.3 SFP Description
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Storage Access Networking Cards
6.1 FC_MR-4 Card Overview
6-2
Figure 6-1 shows the FC_MR-4 faceplate and block diagram.
Table 6 -1 describes the two card-level LEDs on the FC_MR-4 card.
6.1.1 FC_MR-4 Card-Level Indicators
B A C K P L A N E
Card-Level Indicators Description
card if the red FAIL LED persists.
traffic.
6.2 FC_MR-4 Card Modes
6.2.1 Line-Rate Card Mode
6.2.2 Enhanced Card Mode
6.2.2.1 Mapping
6.2.2.2 SW-LCAS
6.2.3 Distance Extension (Enhanced Mode Only)
6.2.4 Interoperability Features (Enhanced Mode Only)
6.3 FC_MR-4 Card Application
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Card Protection
7.1 Electrical Card Protection
7.1.1 1:1 Protection
7.1.2 1:N Protection
7.1.2.1 Revertive Switching
7.1.2.2 1:N Protection Guidelines
7.2 STM-N Card Protection
7.3 Unprotected Cards
7.4 External Switching Commands
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Cisco Transport Controller Operation
8.1 CTC Software Delivery Methods
8.1.1 CTC Software Installed on the TCC2/TCC2P Ca rd
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8.1.2 CTC Software Installed on the PC or UNIX Workstation
8.2 CTC Installation Overview
8.3 PC and UNIX Workstation Requirements
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8.4 ONS 15454 SDH Connection
8.5 CTC Window
8.5.1 Node View
8.5.1.1 CTC Card Colors
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8.5.1.2 Node View Card Shortcuts
8.5.1.3 Node View Tabs
8.5.2 Network View
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8.5.3 Card View
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8.6 TCC2/TCC2P Card Reset
8.7 TCC2/TCC2P Card Database
8.8 Software Revert
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Security and Timing
9.1 Users and Security
9.1.1 Security Requirem ents
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9.1.2 Security Policies
9.1.2.1 Idle User Timeout
9.1.2.2 User Password, Login, and Access Policies
9.1.2.3 Audit Trail
9.2 Node Timing
9.2.1 Network Timing Example
9.2.2 Synchronization Status Messaging
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Circuits and Tunnels
10.1 Overview
10.2 Circuit Properties
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10.2.1 Circuit Status
10.2.2 Circuit States
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10.2.3 Circuit Protection Types
10.2.4 Circuit Information in the Edit Circuit Window
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10.3 Cross-Connect Card Bandwidth
10.4 DCC Tunnels
10.4.1 Traditional DCC Tunnels
10.4.2 IP-Encapsulated Tunnels
10.5 Multiple Destinations for Unidirectional Circuits
10.6 Monitor Circuits
10.7 SNCP Circuits
10.7.1 Open-Ended SNCP Circuits
10.7.2 Go-and-Return SNCP Routing
10.8 MS-SPRing Protection Channel Access Circuits
10.9 Path Trace
10.10 Path Signal Label, C2 Byte
10.11 Automatic Circuit Routing
10.11.1 Bandwidth Allocation and Routing
10.11.2 Secondary Sources and Destinations
10.12 Manual Circuit Routing
10-19
Figure10-8 Mixing 1+1 or MS-SPRing Protected Links with an SNCP
Choose the links of multicard EtherSwitch circuits in a shared packet ring to route from source to
Figure10-9 Ethernet Shared Packet Ring Routing
Multicard EtherSwitch circuits can have virtual SNCP segments if the source or destination is not
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10.13 Constraint-Based Circuit Routing
10.14 Virtual Concatenated Circuits
10.14.1 VCAT Member Routing
10.14.2 Software-Link Capacity Adjustment
10.14.3 VCAT Circuit Size
10.15 Merge Circuits
10.16 Reconfigure Circuits
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SDH Topologies and Upgrades
11.1 SDH Rings and TCC2/TCC2P Cards
11.2 Multiplex Section-Shared Protection Rings
11.2.1 Two-Fiber MS-SPRings
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11-4
Figure 11-2 shows a sample traffic pattern on a four-node, two-fiber MS-SPRing.
Figure11-2 Four-Node, Two-Fiber MS-SPRing Traffic Pattern
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11.2.2 Four-Fiber MS-SPRings
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11.2.3 MS-SPRing Bandwidth
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11.2.4 MS-SPRing Application Sample
11-11
Figure 11-9 shows the shelf assembly layout for Node 0, which has one free slot.
11.2.5 MS-SPRing Fiber Connections
11.2.6 Two-Fiber MS-SPRing to Four-Fiber MS-SPRing Conversion
11.3 Subnetwork Connection Protection
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11-17
11.4 Dual Ring Interconnect
11.4.1 MS-SPRing DRI
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11-20
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11.4.2 SNCP Dual Ring Interconnect
11-23
11-24
11.4.3 SNCP/MS-SPRing DRI Handoff Configurations
11.5 Subtending Rings
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11.6 Linear ADM Configurations
11.7 Extended SNCP Mesh Networks
11-30
11.8 Four Node Configurations
11.9 STM-N Speed Upgrades
11.9.1 Span Upgrade Wizard
11.9.2 Manual Span Upgrades
CTC Network Connectivity
12.1 IP Networking Overview
12.2 IP Addressing Scenarios
12.2.1 Scenario 1: CTC and ONS 15454 SDH Nodes on Same Subnet
12.2.2 Scenario 2: CTC and ONS 15454 SDH Nodes Connected to a Router
12.2.3 Scenario 3: Using Proxy ARP to Enable an ONS 15454 SDH Gateway
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12.2.4 Scenario 4: Default Gateway on CTC Computer
12.2.5 Scenario 5: Using Static Routes to Connect to LANs
12-8
The destination and subnet mask entries control access to the ONS 1 5454 SDH nodes:
as the destination with a subnet mask of 255.255.255.255.
192.168.1.0) and a subnet mask of 255.255.255.0.
12-9
12.2.6 Scenario 6: Using OSPF
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12.2.7 Scenario 7: Provisioning the ONS 15454 SDH Proxy Server
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12-15
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12.2.8 Scenario 8: Dual GNEs on a Subnet
12-18
12.2.9 Scenario 9: IP Addressing with Secure Mode Enabled
12-20
12.3 Provisionable Patchcords
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12.4 Routing Table
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12.5 External Firewalls
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12.6 Open GNE
12-28
12-29
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Alarm Monitoring and Management
13.1 Overview
13.2 Documenting Existing Provisioning
13.3 Viewing Alarm Counts on the LCD for a Node, Slot, or Port
13.4 Viewing Alarms
8/18/03 04.06-002L-10
24C
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13.4.1 Viewing Alarms With Each Nodes Time Zone
13.4.2 Controlling Alarm Display
13.4.3 Filtering Alarms
13.4.4 Viewing Alarm-Affected Circuits
13.4.5 Conditions Tab
13.4.6 Controlling the Conditions Display
13.4.6.1 Retrieving and Displaying Conditions
13.4.6.2 Conditions Column Descriptions
13.4.6.3 Filtering Conditions
13.4.7 Viewing History
13.4.7.1 History Column Descriptions
13.4.7.2 Retrieving and Displaying Alarm and Condition History
13.5 Alarm Severities
13.6 Alarm Profiles
13.6.1 Creating and Modifying Alarm Profiles
13.6.2 Alarm Profile Buttons
13.6.3 Alarm Profile Editing
13.6.4 Alarm Severity Options
13.6.5 Row Display Options
13.6.6 Applying Alarm Profiles
13.7 Suppressing Alarms
13.8 Provisioning External Alarms and Controls
13.8.1 External Alarm Input
13.8.2 External Control Output
13.9 Audit Trail
13.9.1 Audit Trail Log Entries
13.9.2 Audit Trail Capacities
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CHAPTE R
Ethernet Operation
14.1 G-Series Application
14.1.1 G1K-4 and G1000-4 Comparison
14.1.2 G-Series Example
14.1.3 IEEE 802.3z Flow Control and Frame Buffering
14.1.4 Ethernet Link Integrity Support
14.1.5 Gigabit EtherChannel/IEEE 802.3ad Link Aggregation
14.2 G-Series Gigabit Ethernet Transponder Mode
14-6
Server/switch/router
Conventional Gigabit Ethernet signals DWDM filter
Conventional LX or ZX GBICs CWDM or DWDM GBICs
Gigabit Ethernet over CWDM or DWDM GBICs' TX wavelengths
14.2.1 Two-Port Bidirectional Transponder
14.2.2 One-Port Bidirectional Transponder
14.2.3 Two-Port Unidirectional Transponder
14.2.4 G-Series Transponder Mode Characteristics
14.3 E-Series Application
14.3.1 E-Series Modes
14.3.1.1 E-Series Multicard EtherSwitch Group
14.3.1.2 E-Series Single-Card EtherSwitch
14.3.1.3 Port-Mapped (Linear Mapper)
14.3.2 E-Series IEEE 802.3z Flow Control
14.3.3 E-Series VLAN Support
14.3.4 E-Series Q-Tagging (IEEE 802.1Q)
Data Flow
14.3.5 E-Series Priority Queuing (IEEE 802.1Q)
Data Flow
14.3.6 E-Series Spanning Tree (IEEE 802.1D)
14.3.6.1 E-Series Multi-Instance Spanning Tree and VLANs
14.3.6.2 Spanning Tree on a Circuit-by-Circuit Basis
14.3.6.3 E-Series Spanning Tree Parameters
14.3.6.4 E-Series Spanning Tree Configuration
14.4 G-Series Circuit Configurations
14.4.1 G-Series Point-to-Point Ethernet Circuits
14.4.2 G-Series Manual Cross-Connects
14.5 E-Series Circuit Configurations
14.5.1 Port-Mapped Mode and Single-card EtherSwitch Circuit Scenarios
14-21
14.5.2 E-Series Point-to-Point Ethernet Circuits
14.5.3 E-Series Shared Packet Ring Ethernet Circuits
14.5.4 E-Series Hub-and-Spoke Ethernet Circuit Provisioning
14.5.5 E-Series Ethernet Manual Cross-Connects
14.6 Remote Monitoring Specification Alarm Thresholds
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A
Hardware Specifications
A.1 Shelf Specifications
A.1.1 Bandwidth
A.1.2 Configurations
A.1.3 Cisco Transport Controller
A.1.4 External LAN Interface
A.1.5 Alarm Interface
A.1.6 Database Storage
A.1.7 Timing Interface
A.2 SFP Specifications
A.3 General Card Specifications
A.3.1 Power Consumption
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A.3.2 Temperature Ranges
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A.4 Common Control Card Specifications
A.4.1 TCC2 Card Specifications
A.4.2 TCC2P Card Specifications
A.4.3 XC10G Card Specifications
A.4.4 XC-VXL-10G Card Specifications
A.4.5 XC-VXL-2.5G Card Specifications
A.4.6 AIC-I Specifications
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A.5 Electrical Card and FMEC Specifications
A.5.1 E1-N-14 Card Specifications
A.5.2 E1-42 Card Specifications
A.5.3 E3-12 Card Specifications
A.5.4 DS3i-N-12 Card Specifications
A.5.5 STM1E-12 Card Specifications
A.5.6 BLANK Card
A.5.7 FMEC-E1 Specifications
A.5.8 FMEC-DS1/E1 Card Specifications
A.5.9 FMEC E1-120NP Card Specifications
A.5.10 FMEC E1-120PROA Card Specifications
A.5.11 FMEC E1-120PROB Card Specifications
A.5.12 E1-75/120 Impedance Conversion Panel Specifications
A.5.13 FMEC-E3/DS3 Card Specifications
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A.5.14 FMEC STM1E 1:1 Card Specifications
A.5.15 FMEC-BLANK Card Specifications
A.5.16 MIC-A/P Card Specifications
A.5.17 MIC-C/T/P Card Specifications
A.6 Optical Card Specifications
A.6.1 OC3 IR 4/STM1 SH 1310 Card Specifications
A.6.2 OC3 IR/STM1 SH 1310-8 Card Specifications
A.6.3 OC12 IR/STM4 SH 1310 Card Specifications
A.6.4 OC12 LR/STM4 LH 1310 Card Specifications
A.6.5 OC12 LR/STM4 LH 1550 Card Specifications
A.6.6 OC12 IR/STM4 SH 1310-4 Card Specifications
A.6.7 OC48 IR/STM16 SH AS 1310 Card Specifications
A.6.8 OC48 LR/STM16 LH AS 1550 Card Specifications
A.6.9 OC48 ELR/STM16 EH 100 GHz Card Specifications
A.6.10 OC192 SR/STM64 IO 1310 Card Specifications
A.6.11 OC192 IR/STM64 SH 1550 Card Specifications
A.6.12 OC192 LR/STM64 LH 1550 Card Specifications
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A.6.13 OC192 LR/STM64 LH ITU 15xx.xx Card Specifications
A.7 Ethernet Card Specifications
A.7.1 E100T-G Card Specifications
A.7.2 E1000-2-G Card Specifications
A.7.3 G1000-4 Card Specifications
A.7.4 G1K-4 Card Specifications
A.7.5 ML100T-12 Card Specifications
A.7.6 ML1000-2 Card Specifications
A.8 Storage Access Networking Card Specifications
A.8.1 FC_MR-4 Card Specifications
B
Administrative and Service States
B.1 Service States
B.2 Administrative States
B.3 Service State Transitions
B.3.1 Card Service State Transitions
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B.3.2 Port and Cross-Connect Service State Transitions
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C
Network Element Defaults
C.1 Network Element Defaults Description
C.2 Card Default Settings
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C.2.1 E1 Card Default Settings
C.2.2 E1-42 Card Default Settings
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C.2.3 E3 Card Default Settings
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C.2.4 FC_MR-4 Card Default Settings
C.2.5 DS3I Card Default Settings
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C.2.6 Data Card Default Settings
C.2.7 STM1 Card Default Settings
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C.2.8 STM1-8 Card Default Settings
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C.2.9 STM1E-12 Card Default Settings
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C.2.10 STM4 Card Default Settings
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C.2.11 STM4-4 Card Default Settings
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C.2.12 STM16 Card Default Settings
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C.2.13 STM64 Card Default Settings
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C.2.14 MXP_2.5G_10G Card Default Settings
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C.2.15 MXP_2.5G_10E Card Default Settings
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C.2.16 MXP_MR_2.5G Card Default Settings
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C.2.17 MXPP_MR_2.5G Card Default Settings
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C.2.18 TXP_MR_10E Card Default Settings
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C.2.19 TXP_MR_10G Card Default Settings
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Page
Page
Page
C.2.20 TXP_MR_2.5G Card Default Settings
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Page
Page
Page
Page
C.2.21 TXPP_MR_10G Card Default Settings
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C.2.22 OSCM Card Default Settings
C.2.23 OSC-CSM Card Default Settings
C.3 Node Default Settings
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C.4 CTC Default Settings
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INDEX
Numerics
A
B
C
D
E
Page
F
G
H
I
J
K
L
M
N
O
Page
P
Q
R
S
T
U
V
W
X
4-5