Clevo D410E manual Misc Signals 2, Sheet 14 Misc Signals

Schematic Diagrams

962 (Misc Signals) 2 of 4

Programable on-die pull-high strength for CPU_S:

BGA2B

( Infinite, 150, 110, 56 Ohm)

OSC25MHI

A8

R102

4.7K

3

INIT#

INIT#

T18

A9

INIT#

OSC25MHO

A20M#

P16

3

A20M#

A20M#

SMI#

R17

A6

3

SMI#

SMI#

MIITXCLK

INTR

R16

CPU_S

3

INTR

INTR

NMI

Y20

3

NMI

NMI

IGNNE#

U18

B6

3

IGNNE#

IGNNE#

MIITXEN

FERR#

T17

3

FERR#

FERR#

3

STPCLK#

STPCLK#

W20

STPCLK#

CPUSLP#

V19

E8

3

CPUSLP#

CPUSLP#

MIITXD0

4

CLKAPIC

CLKAPIC

Y19

APICCK

APIC

V18

D7

2

2

9

9

APTCD1

W19

APICD0

MIITXD1

1

1

10

10

MIITXD2

C6

3

3

8

8

4

7

22,24

LPC_AD0

LPC_AD0

V5

LAD0

5

4

7

6

LPC_AD1

T7

B4

5

6

22,24

LPC_AD1

LAD1

MIITXD3

LPC_AD2

U6

LPC

10P8R-10K

22,24

LPC_AD2

LAD2

LPC_AD3

W5

22,24

LPC_AD3

LAD3

22,24 LPC_FRAME#

LPC_FRAME#

W4

LFRAME#

MIIRXCLK

A7

22

LPC_DRQ#

LPC_DRQ#

U7

LDRQ#

SERIRQ

V6

19,22,24 SERIRQ

SIRQ

C7

OSC32KHI

MIIRXDV

2

C178

15PF

Y7

R132

C8

C2

MII

MIIRXER

OSC32KHI

32.768KHZ

10M

OSC32KHO

C179

20PF

1

D2

D8

BATOK

OSC32KHO

RTC

MIIRXD0

RP19

18

BATOK

D3

BATOK

PWRGD

D1

A5

10

1

9,26,29

PWRGD

PWROK

(AUX)

MIIRXD1

10

1

9

2

9

2

C196

RTCVDD

8

3

B5

7

8

3

4

0.1UF

C1

MIIRXD2

6

7

4

5

RTCVDD

6

5

962-2

C177

E4

RTCVSS

MIICOL

A4

B7

MIIRXD3

10P8R-10K

0.1UF

4,7

SMBDAT

SMBDAT

R130

0

B2

GPIO20

GPIO

E9

SMBCLK

MIICRS

R129

0

A1

4,7

SMBCLK

GPIO19

MIIMDC

C5

R369

10K

26

AC_SDIN0

AC_SDIN0

A2

AC_SDIN0

MIIMDIO

E7

R368

10K

+3V

AC_SDIN1

D5

20,26

AC_SDIN1

AC_SDIN1

20,26

AC_SDOUT

R135

0

W2

AC_SDOUT

AC97

MIIAVDD

B9

R387

0

T5

B8

20,26

AC_SYNC

AC_SYNC

MIIAVSS

C518

C510

AC_RST#

20,26

AC_RST#

D6

AC_RESET#

20,26

AC_BCLK

AC_BCLK

Y1

AC_BIT_CLK

V2

0.1UF

0.01UF

(MAIN)

GPIO0

T

4

REFCLK1

REFCLK1

W3

OSCI

(MAIN)

GPIO1/LDRQ1#

T8 GATE_LID_SW

GATE_LID_SW

11

R96

10K

SENTEST

G5

29

PCBEEP

PCBEEP

V3

ENTEST

+3V

SPK

T4

ATF_INT#

FROM H8

PWRBTN#

A14

ACPI

(MAIN)

GPIO2/THERM#

R394

4.7K

24

PWRBTN#

(AUX)

+3VS

PWRBTN#

961PME#

B14

28,29

PSON#

PSON#

D14

PME#

(AUX)

(MAIN)

T6

A

C

EXTSMI#

9,24,27,28

PSON#

(AUX)

GPIO3/EXTSMI#

ID0

AUXOK

AUXOK

A15

AUXOK

/others

GPIO

W1

R699

0(R)

LCDID0

A3

D16

1N4148(R)

T

ACPILED

(MAIN)

GPIO4/CLKRUN#

LCDID0

11,30

C167

ID1

LCDID1

0.1UF

(MAIN)

GPIO5/PREQ5#

U5

R700

0(R)

LCDID1

11,27,30

FOR C4

(MAIN)

GPIO6/PGNT5#

U4

ID2

R701

0(R)

LCDID2

LCDID2

11,27,30

36 PM_DPRSLPVR

PM_DPRSLPVR R537

0

DPERSLP

B1

GPIO13/DPRSLPVR

(AUX)

+3V

R398

4.7K

R123

4.7K(R)

+3V

(AUX)

GPIO7

C4

A

C

SCI#

SCI#

24

24

EXTSMI#

EXTSMI#

C

A

E5

GPIO14

(AUX)

D14

1SS355

4.7K

D17

1SS355

R362

+3V

(AUX)

GPIO8/RING

C14

A

C

WAKE-UP

WAKE-UP 24

GMUXSEL

R361

4.7K

E13

GPIO15

(AUX)

D13

1SS355

+3V

KBC

LAN_PWRON

E6

It will change next

(AUX)

GPIO9/AC_SDIN2

2

PM_CPUPERF#

PM_CPUPERF#

A

C

A16

(AUX)

D36

1SS355

GPIO16

verison

29

VGATE

VGATE

R84

0(R)

D13

/geyserville

(AUX)

GPIO10/AC_SDIN3

B3

V_ADJ

V_ADJ

36

R353

4.7K

GPIO17

(AUX)

+3VS

HWSUS_CB#

F5

(AUX)

GPIO11

HWSUS_CB#19

GPIO18

B15

GPIO18/PMCLK

(AUX)

CPUSTP#

(AUX)

GPIO12/CPUSTP#

D4

CPUSTP#

4,29

PCBEEP( LPC addr mapping)

+3VS

SIS962

SB Hardware Trap

PCBEEP

R134

4.7K

NEED NOT to place		+3VS
close to 96X
LPC_AD1	RN11
	8	1
LPC_AD3	7	2
LPC_AD2	6	3
LPC_AD0	5	4
LPC_DRQ#	8P4R-4.7K	4.7K
	R364
SERIRQ	R109	4.7K
SENTEST	R399	0
GPIO pins
NEED NOT to place		+3VS
close to 96X

ATF_INT#	R395	4.7K
CPUSTP#	R141	4.7K(R)
SMBDAT	R391	4.7K
SMBCLK	R392	4.7K
GPIO18	R94	4.7K
LCDID0	R133	10K
LCDID1	R385	10K
LCDID2	R386	10K
GMUXSEL	R101	4.7K(R)
DPERSLP	R131	4.7K
AC_SDIN0	R124	100K
AC_SDIN1	R370	100K
LAN_PWRON	R371	100K
		+3V
V_ADJ	R117	100K
961PME#	R95	4.7K
VGATE	R100	4.7K
HWSUS_CB#	R375	4.7k

		VID1		D15		ATF_INT#
2,36	VID1		C		A
				F01J2E

Sheet 14 of 41

962 (Misc Signals)

2 of 4

B.Schematic Diagrams

962 (Misc Signals) 2 of 4 (71-M4000-D03) B - 15