Technical Reference Guide

Compaq iPAQ Family of Internet Devices

First Edition –- March 2000

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LIST OF TABLES

TABLE 1–1. ACRONYMS AND ABBREVIATIONS.......................................................................................1-3

TABLE 2-1. FEATURE DIFFERENCE MATRIX ........................................................................................... 2-2

TABLE 2-2. ARCHITECTURAL COMPARISON .............................................................................................2-8

TABLE 2-3. INTEL 810E CHIPSET COMPARISON .................................................................................... 2-12

TABLE 2-4. SUPPORT COMPONENT FUNCTIONS.................................................................................... 2-13

TABLE 2-5. ENVIRONMENTAL SPECIFICATIONS.................................................................................... 2-15

TABLE 2-6. ELECTRICAL SPECIFICATIONS............................................................................................ 2-15

TABLE 2-7. PHYSICAL SPECIFICATIONS................................................................................................ 2-16

TABLE 2-8. MULTIBAY 24X CD-ROM DRIVE SPECIFICATIONS............................................................. 2-16

TABLE 2-9. MULTIBAY 24X CD-ROM DRIVE SPECIFICATIONS............................................................. 2-17

TABLE 2-10. HARD DRIVE SPECIFICATIONS ......................................................................................... 2-17

TABLE 3–1. CELERON PROCESSOR STATISTICAL COMPARISON............................................................... 3-2
TABLE 3–2. PENTIUM III PROCESSOR STATISTICAL COMPARISON........................................................... 3-3

TABLE 3–3. SPD ADDRESS MAP (SDRAM DIMM).................................................................................3-6

TABLE 3–4. HOST/PCI BRIDGE CONFIGURATION REGISTERS (GMCH, FUNCTION 0)................................ 3-8

TABLE 4-1. PCI DEVICE CONFIGURATION ACCESS.................................................................................4-4

TABLE 4-2. SYSTEM BOARD PCI DEVICE IDENTIFICATION..................................................................... 4-5

TABLE 4-3. LPC BRIDGE CONFIGURATION REGISTERS (ICH, FUNCTION 0).............................................. 4-7

TABLE 4-4. PCI/AGP BRIDGE CONFIGURATION REGISTERS (MCH, FUNCTION 1).................................. 4-11

TABLE 4-5. MASKABLE INTERRUPT PRIORITIES AND ASSIGNMENTS ...................................................... 4-13

TABLE 4-6. MASKABLE INTERRUPT CONTROL REGISTERS .................................................................... 4-13

TABLE 4-7. INTERVAL TIMER FUNCTIONS............................................................................................ 4-16

TABLE 4-8. INTERVAL TIMER CONTROL REGISTERS ............................................................................. 4-16

TABLE 4-9. CLOCK GENERATION AND DISTRIBUTION...........................................................................4-16

TABLE 4-10. CONFIGURATION MEMORY (CMOS) MAP....................................................................... 4-18

TABLE 4-11. SYSTEM I/O MAP ...........................................................................................................4-29

TABLE 5–1. IDE PCI CONFIGURATION REGISTERS................................................................................ 5-2

TABLE 5–2. IDE BUS MASTER CONTROL REGISTERS.............................................................................. 5-2

TABLE 5–3. 40-PIN PRIMARY IDE CONNECTOR PINOUT.........................................................................5-3

TABLE 5–4. 50-PIN SECONDARY IDE CONNECTOR PINOUT....................................................................5-4

TABLE 5–5. DB-9 SERIAL CONNECTOR PINOUT......................................................................................5-5

TABLE 5–6. SERIAL INTERFACE CONFIGURATION REGISTERS..................................................................5-6

TABLE 5–7. SERIAL INTERFACE CONTROL REGISTERS............................................................................5-7

TABLE 5–8. PARALLEL INTERFACE CONFIGURATION REGISTERS........................................................... 5-10

TABLE 5–9. PARALLEL INTERFACE CONTROL REGISTERS...................................................................... 5-11

TABLE 5–10. DB-25 PARALLEL CONNECTOR PINOUT.......................................................................... 5-14

TABLE 5–11. 8042-TO-KEYBOARD COMMANDS.................................................................................. 5-16

TABLE 5–12. KEYBOARD INTERFACE CONFIGURATION REGISTERS....................................................... 5-17

TABLE 5–13. CPU COMMANDS TO THE 8042......................................................................................5-19

TABLE 5–14. KEYBOARD/POINTING DEVICE CONNECTOR PINOUT........................................................ 5-21

TABLE 5–15. USB INTERFACE CONFIGURATION REGISTERS................................................................. 5-24

TABLE 5–16. USB CONTROL REGISTERS.............................................................................................5-24

TABLE 5–17. USB CONNECTOR PINOUT..............................................................................................5-25

TABLE 5–18. USB CABLE LENGTH DATA............................................................................................5-25