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3)Observe the results in the transcript window.
a.The SPI core is first download to the FPGA device
b.The IDCODE is checked and verified
c.Flash is erased
d.Flash is programmed
After completion of the flash programming, the FPGA will attempt to configure itself from the flash. If the SPI flash setting is not selected with J1; this step will fail. This does not mean the flash is not programmed, but rather the verification of the programmed contents has failed.
'1': SPI access core not detected. SPI access core will be downloaded to the device to enable operations.
PROGRESS_START - Starting Operation. '1': Downloading core...
done.
'1': Reading status register contents...
INFO:iMPACT:2219 - Status register values: INFO:iMPACT - 0011 1111 1001 1110 0000 1010 1000 0000 INFO:iMPACT:2492 - '1': Completed downloading core to device. INFO:iMPACT - '1': Checking done pin....done.
'1': Core downloaded successfully.
'1': IDCODE is '202015' (in hex).
'1': ID Check passed.
'1': IDCODE is '202015' (in hex). '1': ID Check passed.
'1': Erasing Device.
'1': Programming Device.
'1': Reading device contents...
done.
'1': Verification completed.
INFO:iMPACT - '1': Checking done pin....done.
'1': Programmed successfully.
INFO:iMPACT - '1': Checking done pin....done.
'1': Programmed successfully. PROGRESS_END - End Operation.
Elapsed time = | 179 sec. |
Revision 0.00 | 23 |
