Cypress CY14B101K manual Mode Selection A15 A0 Power, Read Sram, Write Sram, Store, Recall

CY14B101K

Table 2. Mode Selection

			A15 – A0	Mode	IO	Power
CE	WE	OE
H	X	X	X	Not Selected	Output High Z	Standby
L	H	L	X	READ SRAM	Output Data	Active
L	L	X	X	WRITE SRAM	Input Data	Active
L	H	L	0x4E38	Read SRAM	Output Data	Active ICC2[1, 2, 3]
			0xB1C7	Read SRAM	Output Data
			0x83E0	Read SRAM	Output Data
			0x7C1F	Read SRAM	Output Data
			0x703F	Read SRAM	Output Data
			0x8FC0	Nonvolatile	Output High Z
				STORE
L	H	L	0x4E38	Read SRAM	Output Data	Active[1, 2, 3]
			0xB1C7	Read SRAM	Output Data
			0x83E0	Read SRAM	Output Data
			0x7C1F	Read SRAM	Output Data
			0x703F	Read SRAM	Output Data
			0x4C63	Nonvolatile	Output High Z
				RECALL

Notes

1.The six consecutive address locations are in the order listed. WE is HIGH during all six cycles to enable a nonvolatile cycle.

2.While there are 17 address lines on the CY14B101K, only the lower 16 lines are used to control software modes.

3.O state depends on the state of OE. The IO table shown is based on OE Low.

Document Number: 001-06401 Rev. *I Page 6 of 28

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