CY14B101K
Pin Configurations
VCAP
A16
A14
A12
A7
A6
A5
INT
A4
NC
NC
NC
VSS
NC
VRTCbat
DQ0
A3
A2
A1
A0
DQ1
DQ2 x1 x2
Figure 1. 48-Pin SSOP
1
2
3
4
5
6
7
8
9
1048-SSOP
11
12Top View
13
14(Not To Scale)
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
VCC A15
HSB
WE
A13
A8
A9
NC
A11
NC
NC
NC
VSS
NC
VRTCcap
DQ6
OE
A10
CE
DQ7
DQ5
DQ4
DQ3
VCC
Table 1. Pin Definitions
Pin Name | Alt | IO Type | Description |
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A0 – A16 |
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| Input | Address Inputs. Used to select one of the 131,072 bytes of the nvSRAM. |
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DQ0 – DQ7 |
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| Input Output | Bidirectional Data IO Lines. Used as input or output lines depending on operation |
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| NC |
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| No Connect | No Connects. This pin is not connected to the die |
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| Input | Write Enable Input, Active LOW. When the chip is enabled and |
| is LOW, data on the IO pins | |||
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| WE | ||||||
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| WE | W | ||||||||||||||||||
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| is written to the specific address location. |
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| Input | Chip Enable Input, Active LOW. When LOW, selects the chip. When HIGH, deselects the chip. | |||||||
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| CE |
| E | ||||||||||||||||
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| Input | Output Enable, Active LOW. The active low |
| input enables the data output buffers during | |||
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| OE | ||||||||
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| OE |
| G | |||||||||||||||||
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| READ cycles. Deasserting OE high causes the IO pins to |
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| X1 |
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| Output | Crystal Connection Drives crystal on start up. |
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| X2 |
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| Input | Crystal Connection for 32.768 kHz crystal. |
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VRTCcap |
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| Power Supply | Capacitor Supplied Backup RTC Supply Voltage. (Left unconnected if VRTCbat is used) | ||||||||||||
VRTCbat |
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| Power Supply | Battery Supplied Backup RTC Supply Voltage. (Left unconnected if VRTCcap is used) | ||||||||||||
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| INT |
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| Output | Interrupt Output. Program to respond to the clock alarm, the watchdog timer, and the power | ||||||||||
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| monitor. Programmable to either active HIGH (push or pull) or LOW (open drain). |
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| VSS |
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| Ground | Ground for the Device. Must be connected to ground of the system. |
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| VCC |
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| Power Supply | Power Supply Inputs to the Device. |
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| Input Output | Hardware Store Busy. When LOW this output indicates a Hardware Store is in progress. When | |||||
| HSB |
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| pulled LOW external to the chip it initiates a nonvolatile STORE operation. A weak internal pull up | |||||
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| resistor keeps this pin HIGH if not connected (connection optional). |
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VCAP |
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| Power Supply | AutoStore™ Capacitor. Supplies power to nvSRAM during power loss to store data from SRAM | ||||||||||||
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| to nonvolatile elements. |
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Document Number: | Page 2 of 28 | ||||||||||||||||||||
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