Cypress manual Software Controlled STORE/RECALL Cycle, Preliminary, CY14B101LA, CY14B101NA

		PRELIMINARY			CY14B101LA, CY14B101NA
Software Controlled STORE/RECALL Cycle
Parameters[27, 28]		Description	20 ns		25 ns		45 ns		Unit
			Min	Max	Min	Max	Min	Max
tRC	STORE/RECALL Initiation Cycle Time		20		25		45		ns
tSA	Address Setup Time		0		0		0		ns
tCW	Clock Pulse Width		15		20		30		ns
tHA	Address Hold Time		0		0		0		ns
tRECALL	RECALL Duration			200		200		200	µs

Switching Waveforms

Figure 12. CE and OE Controlled Software STORE/RECALL Cycle[28]

		tRC	tRC
Address		Address #1	Address #6
	tSA	tCW	tCW
CE		tHA	tHA
t
	SA	tHA
			t
			HA
OE
			tDELAY	tHHHD
HSB (STORE only)	tLZCE	tHZCE		tLZHSB
			High Impedance
DQ (DATA)
			tSTORE/tRECALL
RWI
		Figure 13. Autostore Enable / Disable Cycle

	tRC
Address	Address #1
tSA	tCW
CE
tSA
OE
tLZCE
DQ (DATA)

	tRC
	Address #6
	tCW
tHA	tHA
tHA
	t
	HA
tHZCE	tSS
	tDELAY

Notes

27.The software sequence is clocked with CE controlled or OE controlled reads.

28.The six consecutive addresses must be read in the order listed in Table 2 on page 5. WE must be HIGH during all six consecutive cycles.

Document #: 001-42879 Rev. *B Page 13 of 25

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