Contents
PRELIMINARY
Features
Logic Block Diagram1, 2
CY14B104LA, CY14B104NA
12 Top View 13 not to scale
Pinouts
9 44 - TSOP
not to scale
CY14B104LA, CY14B104NA
Pin Definitions
PRELIMINARY
SRAM Write
Device Operation
SRAM Read
AutoStore Operation
Software RECALL
Hardware RECALL Power Up
Software STORE
PRELIMINARY
Noise Considerations
Preventing AutoStore
Data Protection
PRELIMINARY
CY14B104LA, CY14B104NA
Best Practices
PRELIMINARY
+ Feedback
Operating Range
DC Electrical Characteristics
Maximum Ratings
PRELIMINARY
Thermal Resistance
Data Retention and Endurance
Capacitance
AC Test Conditions
PRELIMINARY
AC Switching Characteristics
Switching Waveforms
CY14B104LA, CY14B104NA
Figure 7. SRAM Read Cycle #2 CE and OE Controlled3, 13
PRELIMINARY
CY14B104LA, CY14B104NA
Figure 8. SRAM Write Cycle #1 WE Controlled3, 16
Figure 9. SRAM Write Cycle #2 CE Controlled3, 16
PRELIMINARY
CY14B104LA, CY14B104NA
Figure 10. SRAM Write Cycle #3 BHE and BLE Controlled 3, 16, 17
PRELIMINARY
AutoStore/Power Up RECALL
Switching Waveforms
CY14B104LA, CY14B104NA
PRELIMINARY
Software Controlled STORE/RECALL Cycle
Switching Waveforms
CY14B104LA, CY14B104NA
PRELIMINARY
Hardware STORE Cycle
Switching Waveforms
CY14B104LA, CY14B104NA
Truth Table For SRAM Operations
For x8 Configuration
For x16 Configuration
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Ordering Information
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CY14B104LA, CY14B104NA
Ordering Information continued
PRELIMINARY
CY14B104LA, CY14B104NA
CY14B104LA, CY14B104NA
Part Numbering Nomenclature
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CY 14 B 104 L A -ZS P 20 X C T
CY14B104LA, CY14B104NA
Package Diagrams
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Figure 16. 44-Pin TSOP II
CY14B104LA, CY14B104NA
Package Diagrams continued
PRELIMINARY
Figure 17. 48-Ball FBGA - 6 mm x 10 mm x 1.2 mm
CY14B104LA, CY14B104NA
Package Diagrams continued
PRELIMINARY
Figure 18. 54-Pin TSOP
Document History Page
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