PRELIMINARY
CY14B104LA, CY14B104NA
AutoStore/Power Up RECALL
Parameters |
|
| Description | 20 ns |
|
| 25 ns |
| 45 ns | Unit | ||||
|
| Min |
| Max | Min |
| Max | Min |
| Max | ||||
|
|
|
|
|
|
|
|
| ||||||
t | [19] |
| Power Up RECALL Duration |
|
| 20 |
|
| 20 |
|
| 20 | ms | |
HRECALL |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
tSTORE [20] |
| STORE Cycle Duration |
|
| 8 |
|
| 8 |
|
| 8 | ms | ||
tDELAY [21] |
| Time Allowed to Complete SRAM Cycle |
|
| 20 |
|
| 25 |
|
| 25 | ns | ||
VSWITCH |
|
| Low Voltage Trigger Level |
|
| 2.65 |
|
| 2.65 |
|
| 2.65 | V | |
tVCCRISE |
|
| VCC Rise Time | 150 |
|
| 150 |
|
| 150 |
|
| μs | |
VHDIS[12] |
|
| HSB | Output Driver Disable Voltage |
|
| 1.9 |
|
| 1.9 |
|
| 1.9 | V |
tLZHSB |
|
| HSB | To Output Active Time |
|
| 5 |
|
| 5 |
|
| 5 | μs |
tHHHD |
|
| HSB | High Active Time |
|
| 500 |
|
| 500 |
|
| 500 | ns |
Switching Waveforms
Figure 11. AutoStore or Power Up RECALL[22]
VSWITCH
VHDIS
HSB OUT
Autostore
POWER-
UP
RECALL
Read & Write
Inhibited
(RWI)
VVCCRISE | Note20 | t | Note20 | t |
|
| STORE |
| STORE |
| tHHHD |
| tHHHD | Note23 |
|
|
| ||
|
|
| tDELAY |
|
| tLZHSB |
| t |
|
|
|
| LZHSB |
|
| tDELAY |
|
|
|
| tHRECALL |
| tHRECALL |
|
|
|
|
|
BROWN | Read & Write | POWER | ||
RECALL | OUT | RECALL |
| DOWN |
| Autostore |
|
| Autostore |
Notes
19.tHRECALL starts from the time VCC rises above VSWITCH.
20.If an SRAM write has not taken place since the last nonvolatile cycle, no AutoStore or Hardware Store takes place.
21.On a Hardware STORE, Software Store / Recall, AutoStore Enable / Disable and AutoStore initiation, SRAM operation continues to be enabled for time tDELAY.
22.Read and write cycles are ignored during STORE, RECALL, and while VCC is below VSWITCH.
23.HSB pin is driven HIGH to VCC only by internal 100 kOhm resistor, HSB driver is disabled.
Document #: | Page 13 of 23 |
[+] Feedback
