Contents
Logic Block Diagram1, 2
Features
PRELIMINARY
CY14B104LA, CY14B104NA
9 44 - TSOP
Pinouts
12 Top View 13 not to scale
not to scale
CY14B104LA, CY14B104NA
Pin Definitions
PRELIMINARY
SRAM Read
Device Operation
SRAM Write
AutoStore Operation
Software STORE
Hardware RECALL Power Up
Software RECALL
PRELIMINARY
Data Protection
Preventing AutoStore
Noise Considerations
PRELIMINARY
PRELIMINARY
Best Practices
CY14B104LA, CY14B104NA
+ Feedback
Maximum Ratings
DC Electrical Characteristics
Operating Range
PRELIMINARY
Capacitance
Data Retention and Endurance
Thermal Resistance
AC Test Conditions
Switching Waveforms
AC Switching Characteristics
PRELIMINARY
CY14B104LA, CY14B104NA
CY14B104LA, CY14B104NA
PRELIMINARY
Figure 7. SRAM Read Cycle #2 CE and OE Controlled3, 13
Figure 8. SRAM Write Cycle #1 WE Controlled3, 16
CY14B104LA, CY14B104NA
PRELIMINARY
Figure 9. SRAM Write Cycle #2 CE Controlled3, 16
Figure 10. SRAM Write Cycle #3 BHE and BLE Controlled 3, 16, 17
Switching Waveforms
AutoStore/Power Up RECALL
PRELIMINARY
CY14B104LA, CY14B104NA
Switching Waveforms
Software Controlled STORE/RECALL Cycle
PRELIMINARY
CY14B104LA, CY14B104NA
Switching Waveforms
Hardware STORE Cycle
PRELIMINARY
CY14B104LA, CY14B104NA
For x16 Configuration
For x8 Configuration
Truth Table For SRAM Operations
PRELIMINARY
Ordering Information
PRELIMINARY
CY14B104LA, CY14B104NA
Ordering Information continued
PRELIMINARY
CY14B104LA, CY14B104NA
PRELIMINARY
Part Numbering Nomenclature
CY14B104LA, CY14B104NA
CY 14 B 104 L A -ZS P 20 X C T
PRELIMINARY
Package Diagrams
CY14B104LA, CY14B104NA
Figure 16. 44-Pin TSOP II
PRELIMINARY
Package Diagrams continued
CY14B104LA, CY14B104NA
Figure 17. 48-Ball FBGA - 6 mm x 10 mm x 1.2 mm
PRELIMINARY
Package Diagrams continued
CY14B104LA, CY14B104NA
Figure 18. 54-Pin TSOP
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