Contents
ADVANCE
Features
Logic Block Diagram
CY14E102L, CY14E102N
Pinouts
Figure 1. Pin Diagram - 48 FBGA Top View
Figure 2. Pin Diagram - 44 TSOP II Top View
Not to Scale
Byte High Enable, Active LOW. Controls DQ15 - DQ8
Figure 3. Pin Diagram - 54 TSOP II Top View
Output Enable, Active LOW. The active LOW
Byte Low Enable, Active LOW. Controls DQ7 - DQ0
SRAM Write
Device Operation
SRAM Read
AutoStore Operation
Software STORE
Hardware RECALL Power Up
Power
Software RECALL
Noise Considerations
Preventing AutoStore
Data Protection
Table 1. Mode Selection continued
Operating Range
DC Electrical Characteristics
Maximum Ratings
Range
AC Test Loads
Capacitance
Thermal Resistance
AC Test Conditions
15 ns
AC Switching Characteristics
Parameters
20 ns
Hardware STORE Cycle
AutoStore and Power Up RECALL
Software Controlled STORE and RECALL Cycle
CY14E102L/CY14E102N
Figure 6. SRAM Read Cycle #2 CE and OE Controlled12, 23
Switching Waveforms
Figure 5. SRAM Read Cycle #1 Address Controlled12, 13
ADVANCE
ADVANCE
Figure 8. SRAM Write Cycle #2 CE Controlled13, 21, 22
Switching Waveforms continued
CY14E102L, CY14E102N
Figure 10. CE Controlled Software STORE/RECALL Cycle19
Switching Waveforms continued
Figure 9. AutoStore or Power Up RECALL26
POWER-UP RECALL
Figure 13. Soft Sequence Processing20
Figure 11. OE Controlled Software STORE/RECALL Cycle19
Figure 12. Hardware STORE Cycle22
Switching Waveforms continued
Speed
Diagram
Ordering Information
Ordering Code
ADVANCE
Ordering Information continued
Diagram
CY14E102L, CY14E102N
ADVANCE
Part Numbering Nomenclature
CY 14 E 102 L - ZS P 15 X C T
CY14E102L, CY14E102N
ADVANCE
Package Diagrams
Figure 14. 44-Pin TSOP
CY14E102L, CY14E102N
ADVANCE
Package Diagrams continued
Figure 15. 48-Ball FBGA - 6 mm x 10 mm x 1.2 mm
CY14E102L, CY14E102N
ADVANCE
Figure 16. 54-Pin TSOP
Package Diagrams continued
CY14E102L, CY14E102N
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