Cypress CY7C1310AV18, CY7C1312AV18, CY7C1314AV18 TAP AC Switching Characteristics , TAP Timing and Test Conditions

CY7C1310AV18
CY7C1312AV18
CY7C1314AV18
PRELIMINARY
Document #: 38-05497 Rev. *A Page 17 of 21
TAP AC Switching Characteristics Over the Operating Range[26, 27]
Parameter Description Min. Max. Unit
tTCYC TCK Clock Cycle Time 100 ns
tTF TCK Clock Frequency 10 MHz
tTH TCK Clock HIGH 40 ns
tTL TCK Clock LOW 40 ns
Set-up Times
tTMSS TMS Set-up to TCK Clock Rise 10 ns
tTDIS TDI Set-up to TCK Clock Rise 10 ns
tCS Capture Set-up to TCK Rise 10 ns
Hold Times
tTMSH TMS Hold after TCK Clock Rise 10 ns
tTDIH TDI Hold after Clock Rise 10 ns
tCH Capture Hold after Clock Rise 10 ns
Output Times
tTDOV TCK Clock LOW to TDO Valid 20 ns
tTDOX TCK Clock LOW to TDO Invalid 0 ns
TAP Timing and Test Conditions[27]
26.tCS and tCH refer to the set-up and hold time requirements of latching data from the boundary scan register.
27.Test conditions are specified using the load in TAP AC test conditions. tR/tF = 1 ns.
(a)
TDO
C
L
= 20 pF
Z
0
= 50 Ω
GND
0.9V
50 Ω
1.8V
0V
ALL INPUT PULSES
0.9V
Test Clock
Test Mode Select
TCK
TMS
Test Data-In
TDI
Test Data-Out
t
TCYC
t
TMSH
t
TL
t
TH
t
TMSS
t
TDIS
t
TDIH
t
TDOV
t
TDOX
TDO
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