Ball Fbga 15 x 17 x 1.4 mm | Cypress CY7C1443AV33, CY7C1441AV33

CY7C1441AV33

CY7C1443AV33,CY7C1447AV33

Package Diagrams (continued)

Figure 2. 165-ball FBGA (15 x 17 x 1.4 mm) (51-85165)

TOP VIEW

PIN 1 CORNER

17.00±0.10

BOTTOM VIEW		PIN 1 CORNER
BOTTOM VIEW

					Ø0.05 M C
					Ø0.25 M C A B
					Ø0.45±0.05(165X)
11	10	9	8	7	6	5	4	3	2	1
										A
										B
1.00										C
1.00										D
										D
										E
										F
										G
14.00										H
14.00
										J
										K
7.00										L
7.00										M
										M
										N
										P
										R
		5.00					1.00
		5.00
				10.00

0.25 C

0.53±0.05

C 0.36

-0.10

+0.05 0.35

SEATING PLANE

1.40 MAX.

0.15 C

B	15.00±0.10
B	15.00±0.10

0.15(4X)
		51-85165-*A

Document #: 38-05357 Rev. *G

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Cypress CY7C1443AV33, CY7C1441AV33, CY7C1447AV33 manual Ball Fbga 15 x 17 x 1.4 mm

Contents

Features Selection Guide Functional DescriptionDescription 133 MHz 100 MHz Unit Cypress Semiconductor Corporation 198 Champion Court Logic Block Diagram CY7C1441AV33 1M x Logic Block Diagram CY7C1443AV33 2Mx Logic Block Diagram CY7C1447AV33 512K x BWE Enable CE1 Register CE2 CE3 CY7C1441AV33 Pin ConfigurationsCY7C1443AV33 2M x TDI TDO Mode BWE Adsc ADVAdsp DQP C DQ G DQ B DQ GDQ B DQP G DQP C DQP DQ C Name Description Pin DefinitionsByte Write Select Inputs, Active LOW. Qualified with Power Supply Inputs to the Core of the Device Power Supply for the IO CircuitryGround for the Core of the Device Ground for the IO Circuitry Functional Overview Interleaved Burst Address Table Mode = Floating or VDDLinear Burst Address Table ZZ Mode Electrical Characteristics Truth TableParameter Description Test Conditions Min Max Unit Cycle Description Partial Truth Table for Read/Write Truth Table for Read/WriteFunction CY7C1441AV33 2 Function CY7C1443AV33 TAP Controller State Diagram Ieee 1149.1 Serial Boundary Scan Jtag TAP Instruction Set Instruction Register TAP Timing Extest TAP AC Switching Characteristics Setup TimesParameter Description Min Max Unit Clock Hold Times TAP DC Electrical Characteristics And Operating Conditions 3V TAP AC Test Conditions5V TAP AC Test Conditions Parameter Description Conditions Min Max Unit Identification Register Definitions Scan Register SizesIdentification Codes Register Name Bit Size CY7C1441AV33 1M x 36, CY7C1443AV33 2M x Bit # Ball ID Ball Fbga Boundary Scan Order13,14Bit # Ball ID Electrical Characteristics Over the Operating Range15 DC Electrical Characteristics Over the Operating RangeMaximum Ratings Operating Range Capacitance Thermal Resistance 100 Unit Parameter Min Max Switching CharacteristicsOutput Times Timing Diagrams Adsp AdscData Out Q High-Z QA1 ADV suspends burst Write Cycle Timing24 Read/Write Cycle Timing24, 26 ZZ Mode Timing28 Ordering Information Package Diagrams Pin Tqfp 14 x 20 x 1.4 mm Ball Fbga 15 x 17 x 1.4 mm Ball Fbga 14 x 22 x1.76 mm CJM Issue Date Orig. Description of ChangeSYT VKN RXUVKN/AESA