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Diamond Power Products MM-48-AT user manual AD9 AD8, Base + Read/Write A/D Channel Register

Models: MM-48-AT

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Base + 1	Read		A/D MSB

Bit No.	7	6		5	4	3	2	1	0

Name	AD15	AD14		AD13	AD12	AD11	AD10	AD9	AD8

Definitions:

AD15 – 8 A/D MSB data (bits 15-8 of the 16-bit value). A/D data is a signed 16-bit value ranging from -32768 to 32767.

Note: Reading from Base + 0 and Base + 1 result in the same physical operation, reading from the FIFO. The FIFO is 8 bits wide x 2048 bytes deep, with A/D data stored and retrieved in interleaved fashion. Data from the A/D is put into the FIFO in little-endian mode, with the LSB inserted first, and the MSB inserted second. Thus the data comes out of the FIFO in the same order. Each time a byte is read from either Base + 0 or Base + 1, the next byte will be read from the FIFO and the FIFO counter will be decremented.

Because the FIFO decrements after each read operation, you cannot read out the same A/D value more than once (unless the FIFO is empty, in which case the last byte may be read indefinitely). It is the programmer’s responsibility to ensure that data is read out of the FIFO properly so that appropriate LSB / MSB pairs are read out together.

Base + 2	Read/Write A/D Channel Register

Bit No.	7	6	5	4	3	2	1	0

Name	HIGH3	HIGH2	HIGH1	HIGH0	LOW3	LOW2	LOW1	LOW0

Definitions:

HIGH3 – 0 High channel of channel scan range; ranges from LOW to 15

LOW3 – 0 Low channel of channel scan range; ranges from 0 to 15 The high channel must be greater than or equal to the low channel.

When this register is written, the current A/D channel is set to the low channel and ADBUSY

=1 for 10 uS. A/D channels are automatically selected in sequence by the board. Each time an A/D conversion starts, the board increments to the next channel in the range. When the high channel is sampled, the board resets to the low channel.

Diamond-MM-48-AT User Manual V1.01

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Diamond Power Products MM-48-AT user manual AD9 AD8, Base + Read/Write A/D Channel Register

Contents

DIAMOND-MM-48-AT Table of Contents Description DIAMOND-MM-48-AT Board Drawing Signal Name Definition O Header Pinout and PIN DescriptionJ3 Analog and Digital I/O Signal Name Definition Relay output contacts J4 Relays and OptocouplersOptoisolated input contacts Board Configuration Base AddressBase Address Jumper Position Hex Decimal Interrupt Level Selection Optocoupler Polarity ReservedAnalog Input Range Overview Base + Write Function Read FunctionLSB MSB Register Map Bit Assignments Write operationsDA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 Read operations Register Definitions Base + WriteDefinitions Base + Read AD9 AD8 Base + Read/Write A/D Channel RegisterHIGH3 HIGH2 HIGH1 HIGH0 LOW3 LOW2 LOW1 LOW0 Base + Read/Write Digital I/O Configuration Register Base + Read/Write Relay Control PortRELAY7 RELAY6 RELAY5 RELAY4 RELAY3 RELAY2 RELAY1 RELAY0 DIR3 DIR2 DIR1 DIR0 DIO3 DIO2 DIO1 DIO0 Base + Read Digital I/O Data and Edge StatusDEDGE3 DEDGE2 DEDGE1 DEDGE0 DIO3 DIO2 DIO1 DIO0 OEN3 OEN2 OEN1 OEN0 POL3 POL2 POL1 POL0 Base + Write Channel and Control Register Daupdt DACH2 DACH1 DACH0OEDGE3 OEDGE2 OEDGE1 OEDGE0 OPTO3 OPTO2 OPTO1 OPTO0 Base + Write Command Register Dapre Daprld Reset Fiforst Adstart Base + Read Status Register POL ADCH3 ADCH2 ADCH1 ADCH0 Base + Write Configuration Register CKSEL1 CKFRQ1 CKFRQ0 Scnint Clken Clksel Base + Read Configuration & Status Register Adbusy Dabusy CKSEL1 CKFRQ1 CKFRQ0 Scnint Clken Clksel Base + Write Fifo Control Register Fifoth Fifoen ScanenBase + Read Fifo Status Register OVF Fifoth Fifoen Scanen Base + Write Interrupt Control Register Clrt Clrd Clro Clra Tinte Dinte Ointe Ainte Base + Read Interrupt Status Register Tint Dint Oint Aint Tinte Dinte Ointe Ainte Base + Read/Write Counter/Timer D7 Base + Read/Write Counter/Timer D15Base + Read/Write Counter/Timer D23 Base + Write Counter/Timer Control Register Ctrno Latch Gtdis Gten Ctdis Cten Load CLRCtrno Base + Read/Write Eeprom / TrimDAC Data Register Base + Read/Write Eeprom / TrimDAC Address Register Base + Write Eeprom Access Key Register Base + Write Calibration Control RegisterBase + Read Calibration Status Register Base + Read Fpga Revision Code Analog Input Ranges and Resolution ResolutionInput Ranges Single Ended and Differential Inputs Performing AN A/D Conversion Trigger an A/D conversion on the current channel LSB = readbase MSB = readbase+1 Data = MSB * 256 + LSB Input voltage = A/D value / 32768 * Full-scale voltage D SCAN, FIFO, and Interrupt Operation TriggerClken Clksel Conversion or Scan Fifo Operation Interrupt OperationFifoen Fifoth Scanen Fifoen = Guidelines for Selecting Fifo Use Fifoen and Fifoth Operation TableAinte Fifoen Scanen Analog Output Overview Generating AN Analog Output Autocalibration Operation Reference Voltages12.2 A/D calibration 12.3 D/A Calibration Digital I/O Operation Procedure for enabling interrupts on selected edges Optocoupler Operation Edge detection assumes OENn = 1 to enable edge detection Polarity and logic readback Relay Operation COUNTER/TIMER Operation Counter 0 A/D Sample ControlCounter 1 Counting/Totalizing Functions Command Sequences Counter Counter Outpbase+15,0x01 Outpbase+15,0x81 Specifications AutocalibrationGeneral