Finisar AN-2030 specifications F i n i s a r, Real Time Diagnostic Registers, Name, Description

Models: AN-2030

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AN-2030: Digital Diagnostic Monitoring Interface for Optical Transceivers

 

F i n i s a r

 

Real Time Diagnostic Registers

 

 

 

 

 

 

TABLE 3.17: A/D Values and Status Bits (2 Wire Address A2h)

 

 

 

 

 

 

 

 

 

Byte

Bit

Name

Description

 

 

 

 

 

 

 

 

 

 

 

 

Converted analog values. Calibrated 16 bit data.

 

 

 

 

96

All

Temperature MSB

Internally measured module temperature.

 

 

 

97

All

Temperature LSB

 

 

 

 

 

98

All

Vcc MSB

Internally measured supply voltage in transceiver.

 

 

99

All

Vcc LSB

 

 

 

 

 

100

All

TX Bias MSB

Internally measured TX Bias Current.

 

 

 

 

101

All

TX Bias LSB

 

 

 

 

 

102

All

TX Power MSB

Measured TX output power.

 

 

 

 

103

All

TX Power LSB

 

 

 

 

 

104

All

RX Power MSB

Measured RX input power.

 

 

 

 

105

All

RX Power LSB

 

 

 

 

 

106

All

Reserved MSB

Reserved for 1st future definition of digitized analog input

 

 

107

All

Reserved LSB

Reserved for 1st future definition of digitized analog input

 

 

108

All

Reserved MSB

Reserved for 2nd future definition of digitized analog input

 

 

109

All

Reserved LSB

Reserved for 2nd future definition of digitized analog input

 

 

 

 

 

 

 

 

Optional Status/Control Bits

 

 

 

 

 

110

7

TX Disable State

Digital state of the TX Disable Input

Pin.

Updated within

 

 

 

 

 

100msec of change on pin. This function is implemented in

 

 

 

 

 

all Finisar transceivers with digital diagnostic capability.

 

 

110

6

Soft TX Disable

Read/write bit that allows software disable of laser. Writing

 

 

 

 

 

‘1’ disables laser. Turn on/off time is 100 msec max from

 

 

 

 

 

acknowledgement of serial byte transmission. This bit is

 

 

 

 

 

“OR”d with the hard TX_DISABLE pin value. Note, per SFP

 

 

 

 

 

MSA TX_DISABLE pin is default enabled unless pulled low

 

 

 

 

 

by hardware. If Soft TX Disable is not implemented, the

 

 

 

 

 

transceiver ignores the value of this bit. Default power up

 

 

 

 

 

value is 0. This function is not implemented in Finisar

 

 

 

 

 

transceivers

 

 

 

 

110

5

Reserved

 

 

 

 

 

110

4

RX Rate Select State

Digital state of the SFP RX Rate Select Input Pin. Updated

 

 

 

 

 

within 100msec of change on pin. This function is not

 

 

 

 

 

implemented in Finisar transceivers.

 

 

 

 

110

3

Soft RX Rate Select

Read/write bit that allows software RX rate select. Writing ‘1’

 

 

 

 

 

selects full bandwidth operation. This bit is “OR’d with the

 

 

 

 

 

hard RX RATE_SELECT pin value.

Enable/disable time is

 

 

 

 

 

100msec max from acknowledgement of serial byte

 

 

 

 

 

transmission. Soft RX rate select does not meet the

 

 

 

 

 

autonegotiation requirements specified in FC-FS. Default at

 

 

 

 

 

power up is zero. If Soft RX Rate Select is not implemented,

 

 

 

 

 

the transceiver ignores the value of this bit. This function is

 

 

 

 

 

not implemented in Finisar transceivers.

 

 

 

110

2

TX Fault

Digital state of the TX Fault Output

Pin.

Updated within

 

 

 

 

 

100msec of change on pin. This function is not implemented

 

 

 

 

 

in Finisar transceivers.

 

 

 

9/26/02 Revision D

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Finisar AN-2030 specifications F i n i s a r, Real Time Diagnostic Registers, Name, Description