Fujitsu MB96300 manual Glrst, Flrst, Graphic Display Controller interface

SK-96370-144PMC-GDC User Guide

Chapter 3 Jumpers and Switches

3.13 Graphic Display Controller interface (JP: 54, 55, 56, 57, 58, 60, 85, 86)

The SK-96370-144PMC-GDC provides the external bus interface on the two connectors X10 and X11 in order to support Graphic Display Controller sub-boards, e.g.: CREMSON-STARTERKITLIME.

Take care of proper jumper settings, in case those external sub-boards will be connected. Some signals, like A22, CS2 and CS3, are shared with the on-board FLASH and SRAM memory (see also chapter 3.11 and 3.12).

JP54 Address line A24 is not supported by the microcontroller

JP55 Address line A25 is not supported by the microcontroller

JP56	Signal sharing of A22 and CS2 for FLASH and GDC	3
		4	2
JP57	Chip selection for external sub board

JP58 1.8V power supply

JP60 Mains power supply

JP70, 71 The port P08_0 may be used e.g. to generate manual reset on the sub board.

Jumper	Setting	Description
JP54	Open	Address line A24 is floating
(A24)
	Closed	Address line A24 is connected to GND
JP55	Open	Address line A25 is floating
(A25)
	Closed	Address line A25 is connected to GND
JP56	2-4	Address line A22 is connected to the FLASH
(GDC/FLASH)	1-2	CS2 is connected to the connector (see jumper JP57), too
	3-4	Address A22 of FLASH is connected to GND
JP57	1-2	Connect CS3 to the connector
(CS2/CS3)
	2-3	Connect CS2 to the connector
JP58	Open	1.8V is not supplied to connector X11B
(1V8)
	Closed	1.8V is supplied to connector X11B
JP60	Open	Mains is not connected to connector X11B
(Mains)	Closed	Mains is connected to X11B
JP70	Open	P08_0 is not connected to X11A_11A
(GLRST)
	Closed	P08_0 is connected to X11A_11A
JP71	Open	P08_0 is not connected to X11A_12A
(FLRST)
	Closed	P08_0 is connected to X11A_12A

Table 3-12: Graphic Display Controller interface

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