Interface
5.3.2 Command descriptions
The contents of the shadow block registers to be necessary for issuing a command and the example indication of the shadow block registers at command completion are shown as following in this subsection.
Example: READ SECTOR (S)
At command issuance
(Shadow Block Registers setting contents)
Bit | 7 |
| 6 |
| 5 | 4 | 3 |
| 2 |
| 1 | 0 |
CM | 0 | 0 | 1 | 0 | 0 |
| 0 |
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DH | x |
| L |
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CH EXP |
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CH |
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CL EXP |
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CL |
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SN EXP |
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SN |
| Start sector No. / LBA |
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SC EXP |
| Transfer sector count |
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SC |
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FR EXP |
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FR |
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At command completion
(Shadow Block Registers to be read)
Bit | 7 | 6 |
| 5 |
| 4 | 3 | 2 |
| 1 |
| 0 |
ST |
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DH | x | L |
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CH EXP |
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CH |
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CL EXP |
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CL |
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SN EXP |
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SN |
| End sector No. / LBA |
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SC EXP |
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SC |
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ER |
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| Error information |
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CH (EXP): | Cylinder High Field (EXP) |
CL (EXP): | Cylinder Low Field (EXP) |
CM: | Command Field |
DH: | Device/Head Field |
ER: | Error Field |
FR (EXP): | Features Field (EXP) |
L:LBA (Logical Block Address) setting bit
SN (EXP): Sector Number Field (EXP)
SC (EXP): Sector Count Field (EXP)
ST: | Status Field |
x, xx: | Don't care (setting is not necessary) |
Note: |
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1.When the L bit is specified to 1, the lower 4 bits of the DH field and all bits of the CH field, CL and SN fields indicate the LBA bits (bits of the DH filed are the MSB (most significant bit) and bits of the SN field are the LSB (least significant bit).
2.At error occurrence, the SC field indicates the remaining sector count of data transfer.
3.Bit indication is omitted in each command description.