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Fujitsu MHW2040BS, MHW2100BS manual DMA Setup Device to Host or Host to Device Bidirectional, Tag

Models: MHW2040BS MHW2100BS MHW2060BS MHW2120BS MHW2080BS

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5.2 Logical Interface

5.2.3.5 DMA Setup - Device to Host or Host to Device (Bidirectional)

The DMA Setup - Device to Host or Host to Device FIS has the following layout:

	3	3		2	2	2	2		2	2	2	2		2	2	1	1		1	1		1	1		1	1	1	1	9	8	7	6	5	4	3	2	1	0
	1	0		9	8	7	6		5	4	3	2		1	0	9	8		7	6		5	4		3	2	1	0

0			Reserved (0)										Reserved (0)									A	I		D	Reserved (0)						FIS Type (41h)
0

1																	0																		TAG
1

2																					0
2

3																		Reserved (0)



4																DMA Buffer Offset
4

5																DMA Transfer Count



6																		Reserved (0)
6

Figure 5.7 DMA Setup - Device to Host or Host to Device FIS layout

The DMA Setup - Device to Host or Host to Device FIS communicates the start of a first-party DMA access to the host system. This FIS is used to request the host system or device to set up the DMA controller before the start of a DMA data transfer.

A - Auto Active bit. If this bit is cleared ("0" is set for the bit), it indicates that a DMA Active FIS transfer is required before a Data FIS transfer.

D - Direction bit. If this bit is set ("1" is set for the bit), it indicates that the data transfer direction is from the device to the host system.

C141-E249

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Fujitsu MHW2040BS, MHW2100BS, MHW2080BS, MHW2120BS, MHW2060BS DMA Setup Device to Host or Host to Device Bidirectional, Tag

Contents

Disk Drives Product Manual Handling of This Manual For Safe Operation Revision History This page is intentionally left blank Overview of Manual Conventions for Alert Messages Operating EnvironmentConventions Liability Exception This page is intentionally left blank Important Alert Messages Important Alert Items This page is intentionally left blank Disk Drives Product Manual Disk Drives Maintenance Manual This page is intentionally left blank Contents Theory of Device Operation Installation Conditions Interface Contents 101 Operations GL-1 AB-1IN-1 Illustrations 171 Tables Recommended connector specifications for the host 106 Device Overview Features Functions and performanceAdaptability Low noise and vibration Error correction and retry by ECCHigh resistance against shock Connection to Sata interface Device Specifications Specifications summarySpecifications 1/2 Examples of model names and product numbers Model and product number Input Voltage Power RequirementsRipple Slope of an input voltage at rise Power Requirements Current and power dissipation Current Requirements and Power Dissipation Environmental Specifications Current fluctuation Typ. at +5 V when power is turned onEnvironmental specifications Shock and vibration specification Acoustic noise specificationAcoustic Noise Shock and Vibration Data assurance in the event of power failure Service lifeMTBF= Mean time to repair Mttr Unrecoverable read error Error RatePositioning error Media Defects Recommended power-off sequence Advanced Power Management APM Advanced Power Management Interface Power Management IPM Host-initiated interface power management HipmDevice-initiated interface power management Dipm Interface power management Device Configuration Device Configuration Sata interface System ConfigurationDrive connection Read/write circuit This page is intentionally left blank Installation Conditions Dimensions Dimensions Mounting OrientationFrame PCA Limitation of mounting Location of breather Ambient temperature Handling cautions Service area Hios ESD Connections with Host System Device connector Connector specifications for host system Signal segment and power supply segmentRecommended connector specifications for the host system Sata interface cable connection This page is intentionally left blank Theory of Device Operation Subassemblies OutlineDisk Spindle Air filter Circuit ConfigurationServo circuit Spindle motor driver circuit Power supply configuration PCA Power-on Sequence Power-on operation sequence Self-calibration Self-calibration contents Execution timing of self-calibration Command processing during self-calibration Read/write preamplifier PreAMP Read/write CircuitWrite circuit Write precompensation Read circuit AGC circuitProgrammable filter circuit FIR circuit Digital PLL circuitD converter circuit Viterbi detection circuit Servo control circuit Servo Control Microprocessor unit MPU Power amplifierServo burst capture circuit A converter DAC Data-surface servo format Physical sector servo configuration on disk surface Servo frame format Operation to move the head to the reference cylinder Actuator motor controlSeek operation Track following operation Acceleration mode Start modeStable rotation mode Spindle motor control This page is intentionally left blank Interface Physical Interface Interface signals Comreset / Cominit Comwake5VDC/GND Out of band signaling Signal interface regulation Cont AlignEOF Pmack ROK RIPRrdy SOF FER Electrical specifications Physical Layer Electrical Requirements 2/3 Physical Layer Electrical Requirements 3/3 COMINIT/COMRESET Connector pinouts Connector pinouts Staggered Spin-up 5 P11 functionDriving Ready LED Requirements for P11 as an output pin Example of the circuit for driving Ready LED Hot Plug Logical Interface Conceptual diagram of communication layers Physical layer Communication layersLink layer Transport layer Shadow Block Register Outline of the Shadow Block Register FIS types Outline of the frame information structure FIS3.2 Register Host to Device FIS layout DMA Active Device to Host Register Device to Host TAG DMA Setup Device to Host or Host to Device Bidirectional Bist combinations Bist Active Bidirectional PIO Setup Device to Host Data Host to Device or Device to Host BidirectionalData FIS Bidirectional layout Block at the conclusion of all subsequent Data to Device 11 Set Device Bits FIS Set Device Bits Device to Host Error Field Shadow block registersUNC Sector Count Field exp Features Field expSector Number Field exp Cylinder Low Field exp Device/Head Field Cylinder High Field expHS3 HS2 HS1 HS0 HS3 Bit Error ERR bit Bit Device Write Fault DF bitStatus field Bit 7 Busy BSY bit Bit 2 Software Reset Srst Command FieldDevice Control Field EStatus Field Host Commands Command code and parametersCommand code and parameters 1/3 Command code and parameters 2/3 Command code and parameters 3/3 Command descriptions Recalibrate X’10’ to X’1F’ Error reporting conditions Read Sectors X’20’ or X’21’ LBA LSB LBA Write Sectors X’30’ or X’31’ 00 *1 Error information Write Verify X’3C’ Host Commands Read Verify Sectors X’40’ or X’41’ Host Commands Seek X’70’ to X’7F’ Diagnostic code Execute Device Diagnostic X’90’ Initialize Device Parameters X’91’ Operation of Download Microcode Download Microcode X’92’ Error reporting conditions Standby Immediate X’94’ or X’E0’ Interface Unload Feature Unload Immediate Command Standby X’96’ or X’E2’ Idle X’97’ or X’E3’ Interface ’FF’ Check Power Mode X’98’ or X’E5’ Sleep X’99’ or X’E6’ Comreset Smart X’B0’ 10 Features Field values subcommands and functions 1/3 Smart Enable Operations 10 Features Field values subcommands and functions 2/3Smart Read LOG Smart Write LOG Smart Disable Operations 10 Features Field values subcommands and functions 3/3’DB’ Smart ENABLE/DISABLE Auto OFF-LINE ’DA’ Smart Return Status Key C2h 12 Format of guarantee failure threshold value data 11 Format of device attribute value data1FF Attribute ID Data format version number Current attribute value Status FlagAttribute value for the worst case so far Raw attribute value 13 Off-line data collection status Self-test execution status14 Self-test execution status 17 Drive error logging capability 15 Off-line data collection capability16 Failure prediction capability flag Smart error logging Guarantee failure thresholdChecksum 18 Log Directory Data Format 19 Data format of Smart Summary Error Log 1/2 Command data structure 19 Data format of Smart Summary Error Log 2/2Error data structure Total number of drive errors Smart Self-Test 20 Data format of Smart Comprehensive Error Log Self-test index Self-test number 22 Selective self-test log data structure Test SpanCurrent LBA under test 23 Selective self-test feature flags Feature FlagsCurrent Span under test Selective Self-test pending time min 24 SCT command and the function Smart Command Transport SCT SCT Status Request SN = E0h, FR = D5h SET MAX EXT, DCO 25 Format of SCT Status Response 1/2 25 Format of SCT Status Response 2/2 26 SCT Status code SCT Command SET SN = E0h, FR = D6 28 Write Same 1/2 27 Action code 28 Write Same 2/2 29 Error Recovery Control Feature Control Command 30 Feature Control Command 31 SCT Data Table 32 had Temperature SCT Read Data SN = E1h, FR = D5 SCT Write Data SN = E1h, FR = D6 Device Configuration Restore Device Configuration XB1Device Configuration Freeze Device Configuration Identify Device Configuration Freeze Lock Features Field = C1h Device Configuration Restore Features Field = C0h Device Configuration SET Features Field = C3h Device Configuration Identify Features Field = C2h Word Value Content 33 Device Configuration Identify data structure 1/2 33 Device Configuration Identify data structure 2/2 Read Multiple X’C4’ 12 Execution example of Read Multiple command Start sector No Write Multiple X’C5’ Start sector No SET Multiple Mode X’C6’ Interface Read DMA X’C8’ or X’C9’ LSB / LBA MSB / LBA Write DMA X’CA’ or X’CB’ Interface Read Buffer X’E4’ Flush Cache X’E7’ Write Buffer X’E8’ Identify Device X’EC’ Identify Device DMA X’EE’ ’3FFF’ 34 Information to be read by Identify Device command 1/3 34 Information to be read by Identify Device command 2/3 34 Information to be read by Identify Device command 3/3 MHW2120BS MHW2100BS MHW2080BS MHW2060BS MHW2040BS ’3FFF’ Command without interrupt supports 2, 4, 8 and 16 sectors Host Commands Interface C141-E249 113 Interface C141-E249 115 Bit = Supports the Mode Word C141-E249 117 = SCT Error Recovery Control supported 35 Features field values and settable modes 1/2 SET Features X’EF’ 35 Features field values and settable modes 2/2 See Table Data Transfer Mode Advanced Power Management APM Serial ATA Functions Write-Read-Verify feature optional 36 Write-Read-Verify feature sector countsAutomatic Acoustic Management AAM 37 Contents of Security SET Password data Error reporting conditions When the master password is selected When the user password is selectedSecurity UNLOCKX’F2’ Host Commands Security Erase Prepare X’F3’ Security Erase Unit X’F4’ Security Freeze Lock X’F5’ Error reporting conditions 39 Contents of security password Error reporting conditions Lbalsb Read Native MAX Address X’F8’ SET MAX Address SET MAX X’F9’ SET MAX SET Password Features Field = 01h Password information DH CH CL SN SC ER SET MAX Lock Features Field = 02h SET MAX Unlock Features Field = 03h SET MAX Freeze Lock Features Field = 04h Read Sector S EXT X’24’ Description CL EXPSN EXP Read DMA EXT X’25’ Description Read Native MAX Address EXT X’27’ Read Multiple EXT X’29’ Read LOG EXT X2F CL EXP SN EXP 41 Tag field information 40 Data format of Read Log Ext log page 10h 43 Counter Identifier information 42 Data format of Read Log Ext log page 11h SC EXP SCT Status Request SN = E0h Error information 152 C141-E249 Write Sector S EXT X’34’ Description Write DMA EXT X’35’ Description SET MAX Address EXT X’37’ SET MAX LBA Write Multiple EXT X’39’ Write LOG EXT X3F Error information C141-E249 159 SCT Command SET SN = E0h SCT Write Data SN = E1h Read Verify Sector S EXT X’42’ Flush Cache EXT X’EA’ Write Multiple FUA EXT XCE Write DMA FUA EXT X3D Read FP DMA Queued Write FP DMA Queued 44 Command code and parameters 1/2 Error postingCommand Name Sfrw Sfrr 44 Command code and parameters 2/2 Non-data command protocol Command ProtocolExecute Device Diagnostic Initialize Device Parameters Data Host PIO data-in command protocol 14 PIO data-in command protocol PIO data-out command protocol 15 PIO data-out command protocol Read DMA EXT Identfy Device Identfy Device DMA DMA data-in command protocol Write DMA EXT FUA EXT DMA data-out command protocol Read FP DMA Queued Write FP DMA Queued Native Command Queuing protocol 18 Read FP DMA Queued command protocol 19 Write FP DMA Queued command protocol 20 Power-on sequence Power-on and Comreset 21 Comreset sequence This page is intentionally left blank Operations Response to power-on Reset and Diagnosis Reset and Diagnosis Response to Comreset Response to Comreset Comreset preservation requirements Software settings preservation SET Address MAX EXT Response to a software reset Response to a software reset Power save mode Power SaveActive mode Active idle mode Sleep mode Standby mode Power commands Power Save Controlled by Interface Power Management IPM Power save mode of the interfacePartial mode Slumber mode Data buffer structure Read-ahead CacheExample of 8 MB buffer Read Multiple EXT Read DMA EXT Read FP DMA Queued Commands that are targets of caching Caching operationData that is a target of caching Invalidating caching-target data Miss-hit Using the read segment buffer Sequential hit Full hit Partial hit Write Cache Command that are targets of cachingCache operation Invalidation of cached data Comreset and software reset response Status report in the event of an errorCashing function when power supply is turned on Enabling and disabling This page is intentionally left blank Command Bios standard for drivesConnector Connector Plug Host system side Actuator Rotational delay Power save modeHost receptacle Master Device Serial-ATA Seek timeSlave Device Status This page is intentionally left blank Abrt BiosAIC Amnf This page is intentionally left blank Index Index Example of model name and product Mode Read Native MAX Address Read/write circuit block diagram Smart summary error log, data Japan Comment Form This page is intentionally left blank C141-E249-01EN Page