3 System Board (P/Ns D3657-63001 and D3661-63001)

Devices on the Processor Local Bus

Devices on the Processor Local Bus

The following subsystems are associated with the Processor Local bus:

•Intel Pentium microprocessor

•cache memory

•main memory

Pentium Processor

The Pentium processor uses a 64-bit bus, and is 100% compatible with Intel’s family of x86 processors. All application software that has been written for Intel 80386 and Intel 80486 processors can run on the Pentium without modification. The Pentium processor contains all the features of the Intel 80486 processor, with the following added features which enhance performance:

•Superscalar Architecture

•Floating Point Unit

•Dynamic Branch Prediction

•Instruction and Data cache

•Data Integrity

•Ability to support MultiProcessor Specification (MPS) 1.1

•PCI bus architecture

•Advanced Power Management capability for reducing power consumption The processor is seated in a Zero Insertion Force (ZIF) socket.

Superscalar Architecture

The Pentium processor’s superscalar architecture has two instruction pipelines and a floating-point unit, each capable of independent operation. The two pipelines allow the Pentium to execute two integer instructions in parallel, in a single clock cycle. This is called instruction pairing. Each instruction must be simple. One pipeline will always receive the next sequential instruction of the one issued to the other pipeline.

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