HP 520 5/XX, 525 5/XX manual Devices on the PCI Bus, Video Controller

3System Board (P/Ns D3657-63001 and D3661-63001) Devices on the PCI Bus

Devices on the PCI Bus

The PL/PCI bridge is implemented within the Intel SB82437FX-66 chip (see page 63). It is responsible for transferring data between the Processor-Local bus and the PCI bus.

As a PCI bus slave, this chip becomes the PL bus master, to generate DRAM requests on behalf of other PCI bus masters. It supports PCI bus burst cycles, posted writes to DRAM for PCI burst writes, and read-ahead from DRAM for PCI burst reads.

As a PCI bus master, this chip provides for programmable PCI bus memory regions in the memory address map, and supports PCI bus burst cycles for 64-bit and 32-bit misaligned Pentium reads and writes. It provides optional posting of PCI memory and I/O writes, optional buffering of PCI memory writes, and optional read-ahead for processor to PCI accesses.

As the PCI bus arbiter, it can handle up to four masters, using a rotating priority scheme.

The PCI bus handles the following peripheral devices:

•video controller

•IDE controller

•other devices in the PCI accessory slots.

Video Controller

Depending on the model, the PC uses one of the following:

•An integrated 32/64-bit Ultra VGA controller on the PCI bus, with 1 MB of video memory. Memory can be increased to 2 MB by installing two 512 KB modules.

•A Matrox MGA Millennium card with 2 MB of video memory that can be increased to 4 MB or 8 MB. The Matrox MGA Millennium video card is installed in one of the PCI slots on the backplane. For a full description of the Matrox MGA Millennium video card, refer to “Matrox MGA Millennium Video Controller Card” on page 127.

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