4 Summary of the HP/Phoenix BIOS

HP/Phoenix BIOS (BIOS version: GJ.07.xx)

Power-On Self-Test (BIOS version: GJ.07.xx)

This section describes the Power-On Self-Test (POST) routines, which are contained in the PC’s ROM BIOS, the error messages which can result, and the suggestions for corrective action.

Each time the system is powered on, or a reset is performed, the POST is executed. The POST process verifies the basic functionality of the system components and initializes certain system parameters. The POST performs the tests in the order described in the table on the next page.

The POST displays a graphic screen with the HP Vectra logo. If the POST detects an error, the error message is displayed. To see the tests performed

during the POST, press when the initial HP “Vectra” logo appears, and the display will switch to text mode. In this mode, a summary configuration screen will be displayed at the end of the POST. Pressing the PAUSE/ BREAK key at any time will allow you to inspect the screen contents. Press any key to resume.

Devices such as the slave disks are validated in the Setup program. You are prompted if a device is found to have gone missing since the previous boot.

During the POST, the BIOS and other ROM data are copied into high-speed shadow RAM. The shadow RAM is addressed at the same physical location as the original ROM in a manner which is completely transparent to applications. It therefore appears to behave as very fast ROM. This technique provides faster access to the system BIOS firmware.

 

If the POST is initiated by a soft reset

 

 

 

and

, the RAM tests

 

 

 

 

 

 

 

 

 

are not executed and shadow RAM is not cleared. In all other respects, the

 

POST executes in the same way following power-on or a soft reset.

 

The POST does not detect when a slave hard disk drive (“HDD 1”

NOTE

 

or “HDD 3” in the setup) has been installed or changed.

 

 

 

 

 

 

 

 

Shadow Ram (BIOS version: GJ.07.xx)

On HP personal computers, access to certain ROM data is enhanced by using shadow RAM. During the POST, the BIOS and other ROM data are copied into high-speed shadow RAM. The shadow RAM is addressed at the same physical location as the original ROM in a manner which is completely transparent to applications. This technique provides faster access to the system BIOS firmware.

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