HP 520 5/XX, 525 5/XX Configuration, Supported Processor P54CS Level-2 L2 256 KB cache sockets

2System Board - (SiS Chipset) (Part Number: D4051-63001) Overview

Configuration

•Supported Processor: P54CS.

•Level-2 (L2) 256 KB cache sockets.

•UMA Chipset from SiS consisting of three chips that interface between the three main buses (the Host bus, the PCI bus and the ISA bus):

SiS 5511: Host/PCI bridge, L2 cache memory controller and memory controller.

SiS 5512: PCI Local Data Buffer (Data Path).

SiS 5513: PCI/ISA bridge, plus integrated functions.

•Six SIMM module sockets for Extended Data Out (EDO) Dram main memory.

•Onboard graphic controller:

SiS 6205 used in UMA mode.

•NS 87308 or NS 87307: Super I/O which includes the following features: Keyboard and mouse controller.

Floppy drive controller. Two serial ports.

One parallel port.

•Little-Ben chip is an HP designed chip that takes care of security features, power management and some glue logic.

•APM (Advanced Power Management) 1.1 power management compliant.

•2 Mb Flash Memory (28F020-150) for BIOS.

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