2System Board - (SiS Chipset) (Part Number:
Feature Summary
Function | Features |
|
|
Floppy disk controller | ❒ Software compatible with the DP8473, the 765A, and the |
| N82077 |
| ❒ |
| ❒ Burst and |
| ❒ Perpendicular recording drive support |
| ❒ New |
| external filter components required) |
| ❒ |
| ❒ Automatic |
|
|
UARTs | ❒ Software compatible with the PC16550A and PC16450 |
| ❒ A modifiable address that is referenced by a |
| ble register. |
| ❒ 13 IRQ channel options. |
| ❒ Shadow register support for |
| ❒ Four |
|
|
Bidirectional parallel port | ❒ Enhanced Parallel Port (EPP) compatible |
| ❒ Extended Capabilities Port (ECP) compatible |
| ❒ Bidirectional under either software or hardware control |
| ❒ Demand mode DMA support. |
| ❒ Selection of internal |
| (PE) pin. |
| ❒ Reduction of PCI bus utilization by supporting a demand DMA |
| mode mechanism and a DMA fairness mechanism. |
| ❒ Includes protection circuit against damage caused when printer |
| is switched on, or operated at higher voltages. |
| ❒ Output buffers that can sink and source 14 mA. |
|
|
Three general purpose pins for three | ❒ Programmed for game port control. |
separate chip select signals | ❒ Chip Select 0 (CS0) signal produces open drain and is powered |
| by the VCCH. |
| ❒ Chip Select 1 (CS1) and 2 (CS2) signals have |
| and are powered by the main VDD. |
| ❒ Decoding of chip select signals depends on the address and the |
| Address Enable (AEN) signal, and can be qualified using the |
| Read (RD) and Write (WR) signals. |
|
|
Enhanced power management | ❒ Special configuration registers for power down |
| ❒ Reduced current leakage from pins. |
| ❒ |
| ❒ Ability to shut off clocks to all modules. |
|
|
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