CLK 10
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| Clk In |
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| Input |
| TTL |
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| Frequency Stability |
| 100 ppm |
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| Duty Cycle |
| 50% ± 5% |
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| Clk Out |
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| Output |
| TTL |
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| Frequency Stability |
| 100 ppm |
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| Duty Cycle |
| 50% ± 5% |
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External Trigger Input
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| Connector | SMB (on faceplate) |
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| Levels | TTL, CMOS, ECL, 0 to +33V |
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| Programmable Threshold | 0 to +30V |
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| Range |
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| Programmable Threshold | ± 0.4V |
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| Accuracy |
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| Threshold Sensitivity | 0.5 Vpp maximum |
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| (hysteresis) | 0.1 Vpp minimum |
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| Input Load | 50 pf, 55 kohms |
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| Maximum Rate | 2 MHz |
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| Minimum Pulse Width | 200 ns |
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External Trigger Output
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| Connector | SMB (on faceplate) |
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| Levels | nominal pull up to + 5V |
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| Maximum External Pull Up | + 30V |
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| Sink Current | 10 mA @ Vol < 0.4V or |
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| 150 mA @ Vol < 1.0V |
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66 Specifications | Appendix A |
