PC Processors (Intel Pentium M)
Code name
Branding
Micro-architecture
MMX / Streaming SIMD
SSE2
Power mgmt technology
L1 cache - bus
L1 data cache
L1 instruction cache
L2 cache - size
L2 cache - data path
L3 cache
System bus
Memory addressability
System bus - width
Execution units
Out-of-order instructions
Branch prediction
Speculative execution
Math coprocessor
Compatibility
Multiple processors
Technology (micron)
Package and connector
Frequency (MHz/GHz)
and available date
Chipset support
All trademarks are the property of their respective owners
© IBM Corp.
(29INTEL) Compiled by Roger Dodson, IBM. June 2003
Banias
Part of the Intel Centrino mobile technology when included with an Intel 855 family chipset and Intel PRO/Wireless
Network Connection wireless chip
IA-32 / micro-op fusion, dedicated stack manager, advanced branch prediction, power-optimized processor system bus
MMX (57 new instructions) / Streaming SIMD Extensions (70 new instructions)
Streaming SIMD Extensions 2 (144 new instructions)
Enhanced Intel SpeedStep technology, Auto Halt, Stop Grant, Deep Sleep, Deeper Sleep
256-bit data path / full speed
32KB data cache / integrated
32KB instruction cache / integrated
1MB / full speed (Advanced Transfer Cache)
256-bit data path (32 bytes) / 64 byte cache line size / 8-way set associative / integrated / unified (internal die; on die)
None
400MHz (transfers data four times per clock) / address bus transfers at two times per clock / 64 byte cache line size
64GB memory addressability / 36-bit addressing / address bus is double clocked at 200MHz
64-bit data path
2 integer units; 1 floating point units; 1 load unit; 1 store unit
Yes (out-of-order instruction execution)
Dynamic (based on history)
Yes (Advanced Dynamic Execution)
Pipelined floating point unit
Compatible with IA-32 software
No SMP support
0.13u
Micro Flip-Chip Pin Grid Array (Micro-FCPGA) requires 479-pin surface mount Zero Insertion Force (ZIF) socket
(mPGA479M socket) or Micro Flip-Chip Ball Grid Array (Micro-FCBGA) for surface mount (479-ball)

Highest Frequency Lowest Frequency Announce

Mode Mode date

900MHz Ultra Low Voltage 900MHz at 1.0 volts 600MHz at 0.85 volts March 2003
1.0GHz Ultra Low Voltage 1.0GHz at 1.0 volts 600MHz at 0.85 volts June 2003
1.1GHz Low Voltage 1.1GHz at 1.18 volts 600MHz at 0.96 volts March 2003
1.2GHz Low Voltage 1.2GHz at 1.18 volts 600MHz at 0.96 volts June 2003
1.3GHz 1.3GHz at 1.5 volts 600MHz at 0.96 volts March 2003
1.4GHz 1.4GHz at 1.5 volts 600MHz at 0.96 volts March 2003
1.5GHz 1.5GHz at 1.5 volts 600MHz at 0.96 volts March 2003
1.6GHz 1.6GHz at 1.5 volts 600MHz at 0.96 volts March 2003
1.7GHz 1.7GHz at 1.5 volts 600MHz at 0.96 volts June 2003
Intel 855 chipset family with DDR-SDRAM memory
Other compatible chipsets
Intel
®
Pentium
®

M processor for mobile systems

Created by IBM PC Institute
Personal Systems Reference (PSREF)