IBM 272 manual PC Processors Intel Pentium M, Intel→ Pentium→ M processor for mobile systems

PC Processors (Intel Pentium M)

Created by IBM PC Institute Personal Systems Reference (PSREF)

Intel→ Pentium→ M processor for mobile systems
Code name	Banias
Branding	Part of the Intel Centrino™ mobile technology when included with an Intel 855 family chipset and Intel PRO/Wireless
	Network Connection wireless chip
Micro-architecture	IA-32 / micro-op fusion, dedicated stack manager, advanced branch prediction, power-optimized processor system bus
MMX™ / Streaming SIMD	MMX™ (57 new instructions) / Streaming SIMD Extensions (70 new instructions)
SSE2	Streaming SIMD Extensions 2 (144 new instructions)
Power mgmt technology	Enhanced Intel SpeedStep™ technology, Auto Halt, Stop Grant, Deep Sleep, Deeper Sleep
L1 cache - bus	256-bit data path / full speed
L1 data cache	32KB data cache / integrated
L1 instruction cache	32KB instruction cache / integrated
L2 cache - size	1MB / full speed (Advanced Transfer Cache)
L2 cache - data path	256-bit data path (32 bytes) / 64 byte cache line size / 8-way set associative / integrated / unified (internal die; on die)
L3 cache	None
System bus	400MHz (transfers data four times per clock) / address bus transfers at two times per clock / 64 byte cache line size
Memory addressability	64GB memory addressability / 36-bit addressing / address bus is double clocked at 200MHz
System bus - width	64-bit data path
Execution units	2 integer units; 1 floating point units; 1 load unit; 1 store unit
Out-of-order instructions	Yes (out-of-order instruction execution)
Branch prediction	Dynamic (based on history)
Speculative execution	Yes (Advanced Dynamic Execution)
Math coprocessor	Pipelined floating point unit
Compatibility	Compatible with IA-32 software
Multiple processors	No SMP support
Technology (micron)	0.13u
Package and connector	Micro Flip-Chip Pin Grid Array (Micro-FCPGA) requires 479-pin surface mount Zero Insertion Force (ZIF) socket
	(mPGA479M socket) or Micro Flip-Chip Ball Grid Array (Micro-FCBGA) for surface mount (479-ball)
		Highest Frequency	Lowest Frequency	Announce
Frequency (MHz/GHz)		Mode	Mode	date
and available date	900MHz Ultra Low Voltage	900MHz at 1.0 volts	600MHz at 0.85 volts	March 2003
	1.0GHz Ultra Low Voltage	1.0GHz at 1.0 volts	600MHz at 0.85 volts	June 2003
	1.1GHz Low Voltage	1.1GHz at 1.18 volts	600MHz at 0.96 volts	March 2003
	1.2GHz Low Voltage	1.2GHz at 1.18 volts	600MHz at 0.96 volts	June 2003
	1.3GHz	1.3GHz at 1.5 volts	600MHz at 0.96 volts	March 2003
	1.4GHz	1.4GHz at 1.5 volts	600MHz at 0.96 volts	March 2003
	1.5GHz	1.5GHz at 1.5 volts	600MHz at 0.96 volts	March 2003
	1.6GHz	1.6GHz at 1.5 volts	600MHz at 0.96 volts	March 2003
	1.7GHz	1.7GHz at 1.5 volts	600MHz at 0.96 volts	June 2003
Chipset support	Intel 855 chipset family with DDR-SDRAM memory
	Other compatible chipsets
All trademarks are the property of their respective owners			(29INTEL) Compiled by Roger Dodson, IBM. June 2003
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