PC Processors (Celeron - Northwood)
Code name
Micro-architecture
MMX / Streaming SIMD
SSE2
L1 cache - bus
L1 data cache
L1 instruction cache
L2 cache - size
L2 cache - data path
Frontside bus
Memory addressability
Frontside bus - width
Execution units
Out-of-order instructions
Branch prediction
Speculative execution
Math coprocessor
Compatibility
Cache line size
Multiple processors
Technology (micron)
Package and connector
Frequency (MHz)
and available date
Chipset support
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© IBM Corp.
(28INTEL) Compiled by Roger Dodson, IBM. November 2003
Celeron Northwood
IA-32 / NetBurst (CISC/RISC/micro-ops) / 20 stage pipeline (Hyper-pipelined technology)
MMX (57 new instructions) / Streaming SIMD Extensions (70 new instructions)
Streaming SIMD Extensions 2 (144 new instructions)
256-bit data path / full speed
8KB data cache / 4-way set associative / write-through / 64 byte cache line / integrated
Size not published / holds 12,000 micro-ops / 8-way set associative / integrated /
called Execution Trace Cache; caches decoded x86 instructions (micro-ops)
128KB / full speed (Advanced Transfer Cache)
256-bit data path (32 bytes) / transfers on each bus clock / 128 byte cache line size (usually divided into two 64 byte
sectors) / 8-way set associative / integrated / unified (internal die; on die) / ECC
400MHz (transfers data four times per clock) / address bus transfers at two times per clock / 64 byte cache line size
64GB memory addressability / 36-bit addressing / address bus is double clocked at 200MHz
64-bit data path
2 integer units; 1 floating point units; 1 load unit; 1 store unit
Two integer units (or Arithmetic Logic Units) run at two times core frequency (Rapid Execution Engine)
Yes
Dynamic (based on history) / 4KB Branch Target Buffer
Yes (Advanced Dynamic Execution)
Pipelined floating point unit / handles 128-bit floating point registers
Compatible with IA-32 software
128 bytes (32 bytes x 4 chunks); burst mode bus of addr-data-data-data
No SMP support
0.13u
Flip-Chip Pin Grid Array-2 (FC-PGA2) requires 478-pin surface mount Zero Insertion Force (ZIF) socket
named mPGA478B socket; used with SDRAM-based chipset (such as 845 chipset)
2.0GHz available September 2002
2.1GHz available November 2002
2.2GHz available November 2002
2.2GHz available June 2003 for mobile systems
2.3GHz available March 2003
2.3GHz available June 2003 for mobile systems
2.4GHz available March 2003
2.4GHz available June 2003 for mobile systems
2.5GHz available June 2003 for both desktop and mobile systems (transportable processors)
2.6GHz available June 2003 for both desktop and mobile systems (transportable processors)
2.7GHz available September 2003 for both desktop and mobile systems (transportable processors)
2.8GHz available November 2003 for both desktop and mobile systems (transportable processors)
Intel 845 and 865 desktop family and others
Intel 852GM, 852GME, 852PM mobile chipset
Intel
®
Celeron
®

for value desktop (and mobile) systems

Created by IBM PC Institute
Personal Systems Reference (PSREF)