PC Processors (Intel Celeron M)

Created by IBM PC Institute Personal Systems Reference (PSREF)

IntelCeleronM processor for mobile systems

 

 

 

Code name

Banias Celeron or ICP-M

 

 

 

Messaging

Based on an architecture designed specifically for mobile computing, the Intel Celeron M processor delivers a balanced

 

level of mobile processor technology and exceptional value in sleeker, lighter notebook designs

Micro-architecture

IA-32 / micro-op fusion, dedicated stack manager, advanced branch prediction, power-optimized processor system bus

MMX/ Streaming SIMD

MMX(57 new instructions) / Streaming SIMD Extensions (70 new instructions)

SSE2

Streaming SIMD Extensions 2 (144 new instructions)

 

Power mgmt technology

Auto Halt, Stop Grant, Deep Sleep, Deeper Sleep

 

 

 

 

 

 

L1 cache - bus

256-bit data path / full speed

 

 

 

L1 data cache

32KB data cache / integrated

 

 

 

L1 instruction cache

32KB instruction cache / integrated

 

 

 

 

 

L2 cache - size

512KB / full speed (Advanced Transfer Cache)

 

L2 cache - data path

256-bit data path (32 bytes) / 64 byte cache line size / 8-way set associative / integrated / unified (internal die; on die)

L3 cache

None

 

 

 

 

 

System bus

400MHz (transfers data four times per clock) / address bus transfers at two times per clock / 64 byte cache line size

Memory addressability

64GB memory addressability / 36-bit addressing / address bus is double clocked at 200MHz

System bus - width

64-bit data path

 

 

 

 

 

 

Execution units

2 integer units; 1 floating point units; 1 load unit; 1 store unit

 

Out-of-order instructions

Yes (out-of-order instruction execution)

 

 

Branch prediction

Dynamic (based on history)

 

 

 

Speculative execution

Yes (Advanced Dynamic Execution)

 

 

Math coprocessor

Pipelined floating point unit

 

 

 

 

 

 

 

 

Compatibility

Compatible with IA-32 software

 

 

 

Multiple processors

No SMP support

 

 

 

 

 

 

 

 

Technology (micron)

0.13u

 

 

 

Package and connector

Micro Flip-Chip Pin Grid Array (Micro-FCPGA) requires 479-pin surface mount Zero Insertion Force (ZIF) socket

 

(mPGA479M socket) or Micro Flip-Chip Ball Grid Array (Micro-FCBGA) for surface mount (479-ball)

 

 

Voltage

Thermal Design Power

Announce

 

 

 

 

date

Frequency (MHz/GHz)

800MHz Ultra Low Voltage

1.004 volts

7 watts

January 2004

and available date

1.2GHz

1.356 volts

24.5 watts

January 2004

 

1.3GHz

1.356 volts

24.5 watts

January 2004

Chipset support

Intel 855 chipset family

 

 

 

 

Intel 852GM

 

 

 

 

Other compatible chipsets

 

 

 

 

 

 

 

 

All trademarks are the property of their respective owners

(33INTEL) Compiled by Roger Dodson, IBM. January 2004

IBM Corp.

 

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IBM 272 manual PC Processors Intel Celeron M, Intel→ Celeron→ M processor for mobile systems