IBM 272 manual PC Processors Mobile Intel Pentium 4-M

PC Processors (Mobile Intel Pentium 4-M)

Created by IBM PC Institute Personal Systems Reference (PSREF)

Mobile Intel→ Pentium→ 4 Processor-M for mobile systems
Code name	Mobile Northwood
Micro-architecture	IA-32 / NetBurst™ (CISC/RISC/micro-ops) / 20 stage pipeline (Hyper-pipelined technology)
MMX™ / Streaming SIMD	MMX™ (57 new instructions) / Streaming SIMD Extensions (70 new instructions)
SSE2	Streaming SIMD Extensions 2 (144 new instructions)
Hyper-Threading	Some: Hyper-Threading (HT) Technology (hardware support for multi-threaded applications)
Power mgmt technology	Enhanced Intel SpeedStep™ technology, Stop Grant, Sleep, Deep Sleep, Deeper Sleep
L1 cache - bus	256-bit data path / full speed
L1 data cache	8KB data cache / 4-way set associative / write-through / 64 byte cache line / integrated
L1 instruction cache	Size not published / holds 12,000 micro-ops / 8-way set associative / integrated /
	called Execution Trace Cache; caches decoded x86 instructions (micro-ops)
L2 cache - size	512KB / full speed (Advanced Transfer Cache)
L2 cache - data path	256-bit data path (32 bytes) / transfers on each bus clock / 128 byte cache line size (usually divided into two 64 byte
	sectors) / 8-way set associative / integrated / unified (internal die; on die)
L3 cache	None
System bus	400 or 533MHz (transfers data four times per clock) / address bus transfers at two times per clock / 64 byte cache line size
Memory addressability	64GB memory addressability / 36-bit addressing / address bus is double clocked at 200MHz
System bus - width	64-bit data path
Execution units	2 integer units; 1 floating point units; 1 load unit; 1 store unit
	Two integer units (or Arithmetic Logic Units) run at two times core frequency (Rapid Execution Engine)
Out-of-order instructions	Yes
Branch prediction	Dynamic (based on history) / 4KB Branch Target Buffer
Speculative execution	Yes (Advanced Dynamic Execution)
Math coprocessor	Pipelined floating point unit / handles 128-bit floating point registers
Compatibility	Compatible with IA-32 software
Cache line size	128 bytes (32 bytes x 4 chunks); burst mode bus of addr-data-data-data
Multiple processors	No SMP support
Technology (micron)	0.13u
Package and connector	400MHz: Micro Flip-Chip Pin Grid Array (uFCPGA) requires 478-pin surface mount Zero Insertion Force (ZIF)
		socket
	533MHz: Micro Flip-Chip Pin Grid Array (uFCPGA2) requires 478-pin surface mount Zero Insertion Force (ZIF)
		socket
		System	Maximum Performance		Battery Optimized Mode	Hyper-Threading (HT) Announce
		bus	Mode			Technology	date
Frequency (MHz)	1.4GHz	400MHz	1.4GHz at 1.3 volts	1.2GHz at 1.2v (<2 watts avg power)			April 2002
	1.5GHz	400MHz	1.5GHz at 1.3 volts	1.2GHz at 1.2v (<2 watts avg power)			April 2002
	1.6GHz	400MHz	1.6GHz at 1.3 volts	1.2GHz at 1.2v (<2 watts avg power)			March 2002
	1.7GHz	400MHz	1.7GHz at 1.3 volts	1.2GHz at 1.2v (<2 watts avg power)			March 2002
	1.8GHz	400MHz	1.8GHz at 1.3 volts	1.2GHz at 1.2v (<2 watts avg power)			April 2002
	1.9GHz	400MHz	1.9GHz at 1.3 volts	1.2GHz at 1.2v (<2 watts avg power)			June 2002
	2.0GHz	400MHz	2.0GHz at 1.3 volts	1.2GHz at 1.2v (<2 watts avg power)			June 2002
	2.2GHz	400MHz	2.2GHz at 1.3 volts	1.2GHz at 1.2v (<2 watts avg power)			Sept 2002
	2.4GHz	400MHz	2.4GHz at 1.3 volts	1.2GHz at 1.2v (<2 watts avg power)			Jan 2003
	2.5GHz	400MHz	2.5GHz at 1.3 volts	1.2GHz at 1.2v (<2 watts avg power)			April 2003
	2.6GHz	400MHz	2.6GHz at 1.3 volts	1.2GHz at 1.2v (<2 watts avg power)			June 2003
	2.40GHz	533MHz	2.40GHz at 1.525 v 1.6GHz at 1.2v (<4.5 watts avg power)				June 2003
	2.66GHz	533MHz	2.66GHz at 1.525 v 1.6GHz at 1.2v (<4.5 watts avg power)				June 2003
	2.80GHz	533MHz	2.80GHz at 1.525 v 1.6GHz at 1.2v (<4.5 watts avg power)				June 2003
	3.06GHz	533MHz	3.06GHz at 1.525 v 1.6GHz at 1.2v (<4.5 watts avg power)				June 2003
	2.66GHz	533MHz	2.66GHz at 1.525v	1.6GHz at 1.2v (<3.0 watts avg power) with Hyper-Threading			Sept 2003
	2.80GHz	533MHz	2.80GHz at 1.525v	1.6GHz at 1.2v (<3.0 watts avg power) with Hyper-Threading			Sept 2003
	3.06GHz	533MHz	3.06GHz at 1.55v	1.6GHz at 1.2v (<3.0 watts avg power) with Hyper-Threading			Sept 2003
	3.2GHz	533MHz	3.2GHz at 1.55 volts 1.6GHz at 1.2v (<3.0 watts avg power) with Hyper-Threading				Sept 2003
Chipset support	Intel 845MZ with DDR-SDRAM memory
	Intel 845MP with DDR-SDRAM memory
	Intel 852GM, 852GME, 852PM with DDR-SDRAM memory

All trademarks are the property of their respective owners	(24INTEL) Compiled by Roger Dodson, IBM. September 2003
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