LXD9785 PQFP Demo Board with FPGA for
Table 2. Quick-Start Switch Settings
| Switch / Label | Setting | Configuration | |
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| Switch S1 | |
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0 |
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0 |
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0 | Sets PHY MDIO base address to 00000. | |||
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0 |
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0 |
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| Switch S5 | |
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0 | Disables Pause function. | |||
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0 | Disables | |||
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0 | Enables MDIO channel. | |||
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| Switch S8 | |
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0 | Switch settings for | |||
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1 | ||||
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/Section | 0 | Enables Section mode: 1x8 or 2x4. | ||
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/ CFG_3 | 1 |
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/ CFG_2 | 1 | Sets port configuration to 100 Mbps and | ||
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/ CFG_1 | 0 |
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Development Kit Manual | 13 |
Document #: 249323
Revision #: 003
Rev. Date: January 24, 2002