Intel Demo Board with FPGA for SS-SMII (Fiber)-to-MII Conversion MII Ports 0 and, LXD9785, Pqfp

Document Revision Rev. Date:

A B

C D E

TP13 TP14 TP15 TP16 TP17 TP18 TP19 TP20

RXD_P0RXD_P0 16

January 24,	#: 249323 #: 003
2002

Development Kit Manual

4

3

2

1

3MDC0_1

3MDIO0_1

P1

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

MII 40 PIN

GND

P2

21

22

23

24

25

26

27

28

29

30

31

32

33

34

35

36

37

38

39

40

MII 40 PIN

GND

								U14
				R207		50 1%	18	1Y1		1A1	2
				R208		50 1%	16				4
								1Y2		1A2
				R209		50 1%	14				6
								1Y3		1A3
1				R211		50 1%	12				8
								1Y4		1A4
2				R213		50 1%	3				17
								2Y4		2A4
3				R215		50 1%	5				15
								2Y3		2A3
4				R217		50 1%	7				13
								2Y2		2A2
5				R219		501%	9				11
								2Y1		2A1
6
7										1G	1
8											19
										2G
9
10	R223	501%		ITE_6				SN74LVC244A			GND
11
12		501%
13	R224			ITN_6
14	R225	501%		IT0_6
15	R226	501%		IT1_6
16	R227	501%		IT2_6
17	R228	501%		IT3_6
18						U15
19
20			R231	50 1%	18	1Y1		1A1	2		CL_6
			R232	50 1%	16				4		CR_6
						1Y2		1A2
		TE_6	R586	50 1%	14				6		ITE_6
						1Y3		1A3
		TN_6	R587	50 1%	12				8		ITN_6
						1Y4		1A4
		T0_6	R588	50 1%	3				17		IT0_6
						2Y4		2A4
		T1_6	R589	50 1%	5				15		IT1_6
						2Y3		2A3
		T2_6	R590	50 1%	7				13		IT2_6
						2Y2		2A2
		T3_6	R591	50 1%	9				11		IT3_6
						2Y1		2A1
								1G	1
									19
								2G
						SN74LVC244A				GND

								U16
				R233		50 1%	18	1Y1		1A1	2
				R235		50 1%	16				4
								1Y2		1A2
				R237		50 1%	14				6
								1Y3		1A3
1				R239		50 1%	12				8
								1Y4		1A4
2				R241		50 1%	3				17
								2Y4		2A4
3				R243		50 1%	5				15
								2Y3		2A3
4				R245		50 1%	7				13
								2Y2		2A2
5				R247		501%	9				11
								2Y1		2A1
6
7										1G	1
8											19
										2G
9											GND
10		501%						SN74LVC244A
11	R249			ITE_7
12		501%
13	R251			ITN_7
14	R253	501%		IT0_7
15	R254	501%		IT1_7
16	R255	501%		IT2_7
17	R256	501%		IT3_7
18						U17
19
20			R257	50 1%	18	1Y1		1A1	2		CL_7
			R258	50 1%	16				4		CR_7
						1Y2		1A2
		TE_7	R626	50 1%	14				6		ITE_7
						1Y3		1A3
		TN_7	R627	50 1%	12				8		ITN_7
						1Y4		1A4
		T0_7	R628	50 1%	3				17		IT0_7
						2Y4		2A4
		T1_7	R629	50 1%	5				15		IT1_7
						2Y3		2A3
		T2_7	R630	50 1%	7				13		IT2_7
						2Y2		2A2
		T3_7	R631	50 1%	9				11		IT3_7
						2Y1		2A1
								1G	1
									19
								2G
						SN74LVC244A
											GND

RXD_P1

RXD_P1 16

1

1 1 1 1 1 1 1

U30A

TXD_P0

TXD_P0 16

R3_6

R210

50 1%

55

RXD3_P0

TXD_P0

108 R415

50 1% TXD_P0

VCCIO

R2_6

R212

50 1%

56

TXD_P1

TXD_P1 16

RXD2_P0

R1_6

R214

50 1%

57

RXD_P0

187

RXD_P0

R0_6

R216

50 1%

58

RXD1_P0

4

RXD0_P0

RV_6

R218

50 1%

59

RXDV_P0

RC_6

R220

50 1%

60

RXCLK_P0

C324

RE_6

R221

50 1%

61

RXER_P0

CAP PAD

R116

R117R118

TE_6

62

TXER_P0

TC_6

R222

50 1%

63

220 220 220

TXCLK_P0

TN_6

65

TXEN_P0

GND

T0_6

66

TXD0_P0

T1_6

67

U1A

TXD1_P0

T2_6

68

TXD2_P0

T3_6

69

TXD3_P0

CL_6

R229

50 1%

70

COL_P0

RXD_P0 R416

45.3 54

RXDO(SS)

LED0_3

80

D5

LED

CR_6

R230

50 1%

71

CRS_P0

55

N/C

LED0_2

81

D6

LED

LED0_1

82

D7

LED

EP20K100QC208-1_SS_SMII

SD0

96

SD0

8

104

TPFIP0

TPFIP0

8

TXD_P0

61

105

TXD0

TPFIN0

TPFIN0

8

1 1 1 1 1 1 1 1

62

N/C

TPFOP0

107

TPFOP0 8

TPFON0

108

TPFON0

8

TP21

TP22

TP23

TP24

TP25

TP26

TP27

TP28

C325

CAP PAD

LXT9785_SS/SMII

3

GND

TP29

TP30

TP31

TP32

TP33

TP34

TP35

TP36

VCCIO

1

1 1 1 1 1 1 1

U30B

R3_7R234

50 1%

34

141 R417

50 1% TXD_P1

RXD3_P1

TXD_P1

R2_7

R236

50 1%

35

RXD2_P1

R1_7

R238

50 1%

36

RXD1_P1

RXD_P1

74

RXD_P1

2

R0_7

R240

50 1%

37

RXD0_P1

RV_7

R242

50 1%

38

RXDV_P1

R119R120R121

RC_7

R244

50 1%

40

RXCLK_P1

C326

RE_7

R246

50 1%

41

RXER_P1

CAP PAD

220 220 220

TE_7

42

TXER_P1

TC_7

R248

50 1%

44

TXCLK_P1

TN_7

45

GND

U1B

TXEN_P1

T0_7

46

TXD0_P1

T1_7

47

TXD1_P1

T2_7

48

TXD2_P1

RXD_P1 R418

45.3 45

RXD1(SS)

LED1_3

75

D8

LED

T3_7

49

TXD3_P1

46

N/C

LED1_2

76

D9

LED

CL_7

R250

50 1%

50

49

77

D10

LED

CR_7

R252

50 1%

51

COL_P1

N/C

LED1_1

CRS_P1

97

51

N/C

SD1

SD1

8

EP20K100QC208-1_SS_SMII

TPFIP1

115

TPFIP1

8

TXD_P1

52

114

53

TXD1

TPFIN1

111

TPFIN1

8

N/C

TPFOP1

110

TPFOP1 8

C327

TPFON1

TPFON1

8

1 1 1 1 1 1 1 1

CAP PAD

LXT9785_SS/SMII

GND

1

TP37

TP38

TP39

TP40

TP41

TP42

TP43

TP44

Title

LXD9785 SS/SMII MII FX DV BOARD

Size

Document Number

Rev

B

MII PORTS 0&1

A2

Date:

Wednesday, February 21, 2001

Sheet

4

of

18

Figure 6. MII Ports 0 and	LXD9785
1	PQFP
	Demo Board with FPGA for SS-SMII
	(Fiber)-to
	-MII
	Conversion

21

A B

C D E