Document #: 249323

Revision #: 003

Rev. Date: January 24, 2002

34

Development Kit Manual

4

3

2

1

 

A

 

 

B

 

 

C

 

 

D

 

 

E

 

 

 

 

 

 

 

 

 

 

VCC_FPGA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

MDC0_FIX

MDC0_FIX

 

 

 

 

 

 

FB10

 

 

 

R573

VCC_MDIO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JP10

 

 

 

 

 

 

 

 

MDC0

 

 

 

MDC0 3

 

 

MDIO0_FIX

 

 

 

 

 

VCC_MDIO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

MDIO0_FIX

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0 OHMS

 

 

 

 

 

 

 

MDIO0

 

 

 

MDIO0 3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Ferrite Bead

 

 

 

 

R614

 

 

 

 

 

 

 

 

 

 

 

 

 

 

U34

 

 

 

 

 

 

 

 

 

 

0 OHMS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C260

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.01uF

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

OE

VCC

5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

 

 

R727 0 OHMS

 

 

 

GND

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MDC0_FIX

2

A

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3 GND

Y 4

 

R574

0 OHMS MDC0

 

 

DO NOT

INSTALL R614

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NC7SZ125M5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

R737 0 OHMS

 

 

 

 

 

 

 

 

 

 

 

VCC_EXT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C261

C262

 

C263

C264

 

 

 

 

 

 

 

 

 

 

 

VCC_MDIO

 

 

 

 

 

 

 

 

 

0.01uF

0.1uF

 

0.01uF

0.1uF

 

 

 

 

 

 

 

U35

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

C266

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

0.01uF

 

 

 

 

 

 

U36

 

 

 

 

 

 

 

 

3

 

 

PLD0_OE0

1

 

 

5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

OE

VCC

 

 

 

 

 

 

 

 

 

 

9 29 17 41

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MDIO0

2

A

 

 

 

 

 

 

 

 

 

 

 

 

VCCIO VCCIO VCCINT VCCINT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

GND

Y

4

R575

50 1%

MDIO0_FIX

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC_EXT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NC7SZ125M5

 

 

 

VCC_MDIO

 

 

 

 

MDC0

37

MDC

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

MDIO0

42

 

 

 

20

R576

50 1%

 

PLD0_OE0

 

 

 

 

 

 

 

 

 

 

 

 

 

MDIO

 

OUT_ENABLE0

 

 

 

 

 

 

 

 

 

 

R728

R577

R578

R579

R580

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

U37

 

 

 

 

0 OHMS

 

 

 

 

 

 

 

 

OUT_ENABLE1

18

R581

50 1%

 

PLD0_OE1

 

 

 

 

 

 

 

 

C267

1K

1K

1K

1K

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

0.01uF

 

 

 

 

PLD0_TDI

1

TDI

 

 

 

 

 

 

 

 

 

 

 

PLD0_OE1

1

 

 

5

 

 

 

 

 

 

PLD0_TMS

7

 

 

 

40

 

 

 

 

 

 

 

OE

VCC

 

 

 

 

 

 

TMS

 

 

INPUT3

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

PLD0_TCK

26

 

 

39

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TCK

 

 

INPUT2

 

 

 

 

 

 

 

MDIO0_FIX

2

 

 

 

 

 

 

 

 

 

PLD0_TDO

32

 

 

38

 

 

 

 

 

 

 

A

 

 

 

 

 

 

 

 

TDO

GNDIO GNDIO GNDINT GNDINT

INPUT1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

GND

Y

4

R582

50 1%

MDIO0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

4 24 16 36

 

 

 

 

 

 

 

 

 

 

 

NC7SZ125M5

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

EPM7032AETC44-4

 

 

 

 

 

 

 

 

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VCC_EXT

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

JP11

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PLD0_TCK

1

2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PLD0_TDO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PLD0_TMS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

5

6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PLD0_TDI

7

8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

9

10

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

HEADER 5X2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

GND

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Title

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LXD9785 SS/SMII MII FX DV BOARD

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Size

Document Number

 

 

 

 

 

Rev

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

B

MDIO0 & MDC0 FIX

 

 

 

 

 

A2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Date:

Wednesday, February 21, 2001 Sheet

17

of

18

 

 

A

B

 

 

 

 

 

C

 

 

 

 

 

D

 

 

 

 

 

 

E

 

 

 

Figure 19. MDIO0 and MDC0 Fix

LXD9785 PQFP Demo Board with FPGA

 

for SS-SMII (Fiber)-to

 

-MII

 

Conversion

Page 34
Image 34
Intel 249323-003, Demo Board with FPGA for SS-SMII (Fiber)-to-MII Conversion manual MDIO0 and MDC0 Fix

249323-003, Demo Board with FPGA for SS-SMII (Fiber)-to-MII Conversion specifications

The Intel 249323-003 demo board is an advanced platform designed for SS-SMII (Synchronous Serial - Synchronous Media Independent Interface) to MII (Media Independent Interface) conversion, utilizing FPGA technology. This demo board serves as a pivotal tool for developers and engineers in the field, facilitating the evaluation and testing of high-speed networking applications, particularly those involving fiber-optic communication.

At its core, the Intel 249323-003 is equipped with a robust FPGA that is capable of handling complex data processing tasks with high efficiency. The FPGA architecture allows for flexible configuration, enabling users to customize the interface as per their specific application requirements. This adaptability is crucial in developing solutions for various networking protocols, ensuring seamless integration across different mediums.

One of the standout features of the demo board is its support for fiber-optic connections, which are essential for high-speed data transmission over long distances. The board includes interfaces that allow for the connection of fiber transceivers, thereby facilitating faster communication speeds and improved bandwidth efficiency. This capability is particularly beneficial for applications in data centers, telecommunications, and other high-bandwidth scenarios.

Additionally, the Intel 249323-003 demo board showcases low latency performance, a critical characteristic for real-time applications. This feature is achieved through sophisticated design and optimization techniques that ensure quick data processing. The board also supports various data rates, making it versatile enough for different use cases.

Another important aspect is the board’s power consumption efficiency. By implementing advanced power management techniques, the Intel 249323-003 minimizes energy usage while maximizing performance, making it a cost-effective solution for developers looking to create sustainable applications.

In terms of connectivity, the demo board offers multiple I/O options, facilitating interaction with other devices and systems. This eases the development process, allowing engineers to prototype and test their designs rapidly.

In conclusion, the Intel 249323-003 demo board is a sophisticated and versatile platform for SS-SMII to MII conversion. With its powerful FPGA, support for fiber-optic interfaces, low latency, and efficient power management, it stands out as a vital resource for developers working on high-speed networking solutions. Whether for prototyping or extensive testing, this demo board equips engineers with the tools necessary to innovate and elevate their networking projects to new heights.