Intel 249323-003 manual JTAG Test Signals, Extended Temperature Operation with the LXT9785HE

Models: 249323-003 Demo Board with FPGA for SS-SMII (Fiber)-to-MII Conversion

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4.4JTAG Test Signals

LXD9785 PQFP Demo Board with FPGA for SS-SMII (Fiber)-to-MII Conversion

4.4JTAG Test Signals

The boundary scan test port is accessed via JP3 for board- level testing. The JTAG test signal descriptions are shown in Table 7. The BSDL file for the LXT9785/9785E is available on the Intel web site at http://developer.intel.com/design/network/.

Table 7. JTAG Test Signal Descriptions

Jumper

Pin#

Symbol

Description

 

 

 

 

 

1

TRST#

Test Reset. Input sourced by ATE

 

 

 

 

 

3

TCK

Test Clock. Input sourced by ATE.

 

 

 

 

JP3

5

TMS

Test Mode Select. Input sourced by ATE.

 

 

 

7

TDO

Test Data Output. Output sourced by the PHY.

 

 

 

 

 

 

8

TDI

Test Data Input. Input sourced by the ATE.

 

 

 

 

 

2,4,6

GND

Connected to system ground.

 

 

 

 

JP11 / PLD0

JP11 is used for FPGA debug and is not designated for evaluation of the LXT9785/9785E

device.

 

 

 

 

 

 

 

 

 

4.5Extended Temperature Operation with the LXT9785HE

The LXT9785HE provides reliable Ethernet transceiver functionality from -40oC to +85oC. Any LXD9785 demo board supporting a QFP package can support an LXT9785HE mounted and localized extended temperature applied to the LXT9785HE. The LXD9785 demo board components are commercial temperature grade.

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Development Kit Manual

Document #: 249323 Revision #: 003 Rev. Date: January 24, 2002

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Intel 249323-003 manual JTAG Test Signals, Extended Temperature Operation with the LXT9785HE, JTAG Test Signal Descriptions