KS57C2308/P2308/C2316/P2316 TIMERS and TIMER/COUNTERS
11-15
TC0 CLOCK FREQUENCY OUTPUT
Using timer/counter 0, a modifiable clock frequency can be output to the TC0 clock output pin, TCLO0. To select
the clock frequency, load the appropriate values to the TC0 mode register, TMOD0. The clock interval is
selected by loading the desired reference value into the reference register TREF0. To enable the output to the
TCLO0 pin, the following conditions must be met:
TC0 output enable flag TOE0 must be set to "1"
I/O mode flag for P2.0 must be set to output mode ("1")
Output latch value for P2.0 must be set to "0"
In summary, the operational sequence required to output a TC0-generated clock signal to the TCLO0 pin is as
follows:
1. Load a reference value to TREF0.
2. Set the internal clock frequency in TMOD0.
3. Initiate TC0 clock output to TCLO0 (TMOD0.2 = "1").
4. Set P2.0 mode flag to "1".
5. Clear P2.0 output latch to "0".
6. Set TOE0 flag to "1".
Each time TCNT0 overflows and an interrupt request is generated, the state of the output latch TOL0 is inverted
and the TC0-generated clock signal is output to the TCLO0 pin.
++ PROGRAMMING TIP — TC0 Signal Output to the TCLO0 Pin
Output a 30 ms pulse width signal to the TCLO0 pin:
BITS EMB
SMB 15
LD EA,#79H
LD TREF0,EA
LD EA,#4CH
LD TMOD0,EA
LD EA,#04H
LD PMG2,EA ;P2.0 output mode
BITR P2.0 ;Clear P2.0 output latch
BITS TOE0