Samsung KS57C2308 manual A.C. Electrical Characteristics, Input Width

KS57C2308/P2308/C2316/P2316ELECTRICAL DATA

Table 14-6. A.C. Electrical Characteristics

(TA = – 40 °C to + 85 °C, VDD = 1.8 V to 5.5 V)

Parameter	Symbol	Conditions				Min	Typ	Max	Units
Instruction cycle	tCY	VDD = 2.7 V	to	5.5 V		0.67	–	64	µs
time (1)		VDD = 1.8 V	to	4.5	V	0.95	–	64
		With subsystem clock (fxt)				114	122	125
TCL0 input	fTI0	VDD = 2.7 V to		5.5	V	0	–	1.5	MHz
frequency		VDD = 1.8 V to		5.5V				1	MHz
TCL0 input high,	tTIH0, tTIL0	VDD = 2.7 V	to	5.5	V	0.48	–	–	µs
low width		VDD = 1.8 V	to	5.5 V		1.8
SCK cycle time	tKCY	VDD = 2.7 V	to	5.5	V	800	–	–	ns
		External SCK source
		Internal SCK source
						650
		VDD = 1.8 V to		5.5 V		3200
		External SCK source
		Internal SCK source
						3800
SCK high, low	tKH, tKL	VDD = 1.8 V	to	5.5	V	400	–	–	ns
width		External SCK source
		Internal SCK source				tKCY/2 – 50
		VDD = 1.8 V to		5.5 V		1600
		External SCK source
		Internal SCK source				tKCY/2 – 150
SI setup time to	tSIK	External SCK source				100	–	–	ns
SCK high		Internal SCK source				150
SI hold time to	tKSI	External SCK source				400	–	–	ns
SCK high		Internal SCK source				400
Output delay for	tKSO	VDD = 2.7 V	to	5.5 V		–	–	300	ns
SCK to SO		External SCK source
		Internal SCK source						250
		VDD = 1.8 V to 5.5 V						1000
		External SCK source
		Internal SCK source						1000
Interrupt input	tINTH,	INT0				(2)	–	–	µs
	tINTL
high, low width		INT1, INT2, INT4, KS0–KS7				10
RESET Input Low	tRSL	Input				10	–	–	µs
Width

NOTES:

1.Unless otherwise specified, Instruction Cycle Time condition values assume a main system clock (fx) source.

2.Minimum value for INT0 is based on a clock of 2tCY or 128/fx as assigned by the IMOD0 register setting.

14-7