MEMORY MAP KS57C2308/P2308/C2316/P2316
4-32
WMOD — Watch Timer Mode Register F89H, F88H
Bit 76543210
Identifier .7 "0" .5 .4 .3 .2 .1 .0
RESET Value 0000(note)000
Read/Write WWWWRWWW
Bit Addressing 88881888
.7 Enable/Disable Buzzer Output Bit
0Disable buzzer (BUZ) signal output
1Enable buzzer (BUZ) signal output
.6 Bit 6
0Always logic zero
.5–.4Output Buzzer Frequency Selection Bits
0 0 2 kHz buzzer (BUZ) signal output
0 1 4 kHz buzzer (BUZ) signal output
1 0 8 kHz buzzer (BUZ) signal output
1 1 16 kHz buzzer (BUZ) signal output
.3 XTIN Input Level Control Bit
0Input level to XTIN pin is low; 1-bit read-only addressable for test
1Input level to XTIN pin is high; 1-bit read-only addressable for test
.2 Enable/Disable Watch Timer Bit
0Disable watch timer and clear frequency dividing circuits
1Enable watch timer
.1 Watch Timer Speed Control Bit
0Normal speed; set IRQW to 0.5 seconds
1High-speed operation; set IRQW to 3.91 ms
.0 Watch Timer Clock Selection Bit
0Select the system clock (fxx/128) as the watch timer clock
1Select a subsystem clock as the watch timer clock
NOTE:RESET sets WMOD.3 to the current input level of the subsystem clock, XTIN. If the input level is high,
WMOD.3 is set to logic one; if low, WMOD.3 is cleared to zero along with all the other bits in the WMOD
register.