ADDRESSING MODES KS57C2308/P2308/C2316/P2316
3-6
DIRECT AND INDIRECT ADDRESSING
1-bit, 4-bit, and 8-bit data stored in data memory locations can be addressed directly using a specific register or
bit address as the instruction operand.
Indirect addressing specifies a memory location that contains the required direct address. The KS57 instruction
set supports 1-bit, 4-bit, and 8-bit indirect addressing. For 8-bit indirect addressing, an even-numbered RAM
address must always be used as the instruction operand.
1-BIT ADDRESSING
Table 3-2. 1-Bit Direct and Indirect RAM Addressing
Operand
Notation Addressing Mode
Description EMB Flag
Setting Addressable
Area Memory
Bank Hardware I/O
Mapping
000H–07FH Bank 0 –
DA.b Direct: a bit is indicated by the
RAM address (DA), memory
bank selection, and a the
specified bit number (b).
0F80H–FFFH Bank 15 All 1-bit
addressable
peripherals
(SMB = 15)
1000H–FFFH SMB = 0, 1,
15
mema.b Direct: a bit is indicated by the
addressable area (mema) and
a the bit number (b).
xFB0H–FBFH
FF0H–FFFH Bank 15 IS0, IS1, EMB,
ERB, IEx, IRQx,
Pn.n
memb.@L Indirect: a bit is indicated by
the addressable area
(memb.7–2 (upper) + L.3–2
(lower)) and the bit number
(L.1–0).
xFC0H–FFFH Bank 15 BSCn.x
Pn.n
@H + DA.b Indirect: a bit is indicated by
the addressable area (H
(upper) + DA.3–0 (lower)) ,
memory bank selection, and
the bit number (b).
0000H–0FFH Bank 0 –
1000H–FFFH SMB = 0, 1,15 All 1-bit
addressable
peripherals
(SMB = 15)
NOTE:“x” means don’t care.